Device architecture and method for improved packing of vertical field effect devices
AssigneeD3 Semiconductor LLC
InventorsThomas E. Harrington, III, Robert Kuo-Chang Yang
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AssigneeD3 Semiconductor LLC
InventorsThomas E. Harrington, III, Robert Kuo-Chang Yang
Estimating the term…
A semiconductor field-effect device is disclosed that utilizes an octagonal or inverse-octagonal deep trench super-junction in combination with an octagonal or inverse-octagonal gate trench. The field-effect device achieves improved packing density, improved current density, and improved on resistance, while at the same time maintaining compatibility with the multiple-of-45°-angles of native photomask processing and having well characterized (010), (100) and (110) (and their equivalent) silicon sidewall surfaces for selective epitaxial refill and gate oxidation, resulting in improved scalability. By varying the relative length of each sidewall surface, devices with differing threshold voltages can be achieved without additional processing steps. Mixing trenches with varying sidewall lengths also allows for stress balancing during selective epitaxial refill.
A method for making a field effect device comprising the steps of:
An apparatus comprising:
An system comprising a plurality of field effect devices, each field effect device comprising:
Dependencies are inferred from the claim text.