US 9,865,717 B2Granted

Semiconductor device

AssigneeInfineon Technologies Austria AG

InventorsStephan Voss, Frank Dieter Pfirsch

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Abstract

A semiconductor device includes transistor cells formed inside a semiconductor body. First and second semiconductor well regions have second conductivity type dopants and are arranged external of the transistor cells. The first semiconductor well region is arranged between two transistor cells and the second semiconductor well region is electrically connected with a load contact. A separation region has first conductivity type dopants and extends from a surface of the semiconductor body along the vertical direction and is arranged between and in contact with each of the first and second semiconductor well regions. The first semiconductor well region extends at least as deep as each of body regions of two transistor cells. A transition in a first lateral direction between the separation and first semiconductor well regions extends continuously from the surface to a point in the semiconductor body at least as deep as each body region of two transistor cells.

Claims15

Dependent claims

A semiconductor device comprising:

a semiconductor body having a surface and including a drift region having dopants of a first conductivity type;
a first load contact configured to feed a load current into the semiconductor body and being arranged in contact with the surface;
and
a plurality of transistor cells formed at least partially inside the semiconductor body, each transistor cell including a section of the drift region and a body region having dopants of a second conductivity type complementary to the first conductivity type, wherein a transition between the body region and the drift region forms a pn-junction;
wherein the semiconductor body further comprises:
at least one first semiconductor well region having dop ants of the second conductivity type and being arranged external of the transistor cells and at least partially between at least two transistor cells, and extending from the surface along a vertical direction at least as deep as each of the body regions of the at least two transistor cells;
at least one second semiconductor well region having dopants of the second conductivity type and being arranged external of the transistor cells, wherein the at least one second semiconductor well region is electrically connected with the first load contact;
and
at least one separation region extending from the surface along the vertical direction and having dop ants of the first conductivity type and being arranged between and in contact with each of the at least one first semiconductor well region and the at least one second semiconductor well region,
wherein a transition in a first lateral direction between the at least one separation region and the at least one first semiconductor well region extends continuously from the surface to a point in the semiconductor body positioned at least as deep as each of the body regions of the at least two transistor cells.

7 more elements

A semiconductor device comprising a semiconductor body having a surface, the semiconductor body comprising:

an active zone including a plurality of transistor cells, each transistor cell including a section of a drift region having dopants of a first conductivity type and a body region having dopants of a second conductivity type complementary to the first conductivity type, wherein a transition between the body region and the drift region forms a pn-junction;
and
an edge zone surrounding the active zone and forming lateral edges of the semiconductor body;
wherein the active zone further comprises at least one first semiconductor well region having dopants of the second conductivity type and being arranged external of the transistor cells and at least partially between at least two transistor cells, and extending from the surface along a vertical direction at least as deep as each of the body regions of the at least two transistor cells;
and
the edge zone and the active zone each comprise at least one second semiconductor well region having dop ants of the second conductivity type and being arranged external of the transistor cells;
and
wherein at least one first separation region is arranged between and in contact with each of the at least one first semiconductor well region and the at least one second semiconductor well region located in the active zone, the at least one first separation region extending from the surface along the vertical direction and having dop ants of the first conductivity type;
and
at least one second separation region is arranged between and in contact with each of the at least one first semiconductor well region and the at least one second semiconductor well region located in the edge zone, the at least one second separation region extending from the surface along the vertical direction and having dopants of the first conductivity type.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/337,094Filed 28 Oct 2016
Priority: DE 10 2015 118 55029 Oct 2015
Published: US 2017/0125560 A14 May 2017
Granted: 9 Jan 2018
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10D 12/481
Having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions: having gate…
H10D 12/038
Of vertical IGBTs: having a recessed gate, e.g. trench-gate IGBTs
H10D 62/105
For increasing or controlling the breakdown voltage of reverse-biased devices: by having particular doping profiles, shapes or arrangements of PN…
H10D 62/106
By having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination…