Semiconductor device with peripheral void space and method of making the same

A semiconductor device, comprising:

• a first semiconductor region of a first conductivity type and having first surface;
• a second semiconductor region of the first conductivity type above a central portion of the first surface in a first direction orthogonal to the first surface, the second semiconductor region having a first conductivity type carrier concentration that is less than a first conductivity type carrier concentration of the first semiconductor region;
• a third semiconductor region of a second conductivity type on the second semiconductor region;
• a fourth semiconductor region above an outer peripheral portion of the first surface in the first direction;
• a void space surrounding the second and third semiconductor regions, the void space being between the second and fourth semiconductor regions and the third and fourth semiconductor regions in a lateral direction parallel to the first surface;
• and
• a first insulating layer above the void space in the first direction and spanning in the lateral direction from the third semiconductor region to the fourth semiconductor region, wherein:
• a first wall of the void space comprises a first insulating material covering outer peripheral surfaces of the second and third semiconductor regions, and extending in the first direction from the first semiconductor region to the first insulating layer,
• a second wall of the void space comprises the first insulating material covering a lateral surface of the fourth semiconductor region facing the void space, and extending in the first direction from the first semiconductor region to the first insulating layer, and
• the first wall and the second wall have a constant thickness of first insulating material, in the lateral direction, from a lowermost level of the void space to an uppermost level of the void space.

A method, comprising:

• forming a first semiconductor region of a first conductivity type having a first surface;
• forming a second semiconductor region of the first conductivity type above a central portion of the first surface in a first direction orthogonal to the first surface, the second semiconductor region having a first conductivity type carrier concentration that is less than a first conductivity type carrier concentration of the first semiconductor region;
• forming a third semiconductor region of a second conductivity type on the second semiconductor region in the first direction;
• forming a fourth semiconductor region above an outer peripheral portion of the first surface in the first direction;
• forming a void space surrounding the second and third semiconductor regions, the void space being between the second and fourth semiconductor regions and the third and fourth semiconductor regions in a lateral direction parallel to the first surface;
• and
• forming a first insulating layer above the void space in the first direction and spanning in the lateral direction from the third semiconductor region to the fourth semiconductor region, wherein:
• a first wall of the void space is formed of a first insulating material that covers outer peripheral surfaces of the second and third semiconductor regions and extends in the first direction from the first semiconductor region to the first insulating layer, and
• a second wall of the void space is formed of the first insulating material that covers a lateral surface of the fourth semiconductor region facing the void space and extends in the first direction from the first semiconductor region to the first insulating layer, wherein
• the first wall and the second wall have a constant thickness of first insulating material, in the lateral direction, from a lowermost level of the void space to an uppermost level of the void space.