Semiconductor device and semiconductor-device manufacturing method
AssigneeSony Corporation
InventorsKan Shimizu, Keishi Inoue
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AssigneeSony Corporation
InventorsKan Shimizu, Keishi Inoue
Estimating the term…
It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.
A semiconductor device, comprising:
An electronic device, comprising:
Dependencies are inferred from the claim text.
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Constructional details of image sensors: interconnections
Of interconnections within wafers or substrates: the interconnections being through-semiconductor vias
The interconnections being through-semiconductor vias: comprising etching via holes that stop on pads or on electrodes
The interconnections being through-semiconductor vias: comprising etching via holes from the back sides of the chips, wafers or substrates
About 5 years 10 months of term left · ends 16 Aug 2032 (estimated)
In general, the present technology relates to a semiconductor device and a method for manufacturing the semiconductor device. More particularly, the present technology relates to a semiconductor device having reduced resistance variations and improved wiring reliability and relates to a method for manufacturing the semiconductor device.
In recent years, the market of small-size camera modules applied to digital still cameras and smart phones draws attention. A CCD (Charge Couple Device) and a CMOS (Complementary Metal Oxide Semiconductor) image sensor are typical solid-state imaging devices used in the camera modules. In the case of such a solid-state imaging device, accompanying miniaturizations in the semiconductor technology, it has become possible to improve the performance of the image sensor, contract the footprint and enhance the integration. In addition, as one technology for further improving the performance of the image sensor, further contracting the footprint and further enhancing the integration, there has been provided a technology for manufacturing three-dimensional semiconductor integrated circuits. A typical example of this technology has been reported in Japanese Patent Laid-open No. 2010-245506 as a technology for manufacturing a semiconductor device configuring a solid-state image pickup device of the rear-surface radiation type. In accordance with this technology, first of all, semiconductor elements having different functions are joined to each other. In this case, the semiconductor elements having different functions are a semiconductor element having a pixel array and a semiconductor element having a logic circuit. Then, the pixel array and the logic circuit are connected electrically to each other by making use of TSV (Through-Silicon Via) configured to penetrate a silicon substrate.
By the way, in a process to construct a semiconductor device making use of through-silicon vias, without regard to whether the device has the rear-surface radiation type or the front-surface radiation type, the semiconductor element having a pixel array is electrically connected to the semiconductor element having a logic circuit. Thus, it is necessary that the through-silicon via assure low resistances and high wiring reliability. In addition, in the case of the through-silicon vias, in particular, in order to electrically connect the semiconductor element having a pixel array to the semiconductor element having a logic circuit with a high degree of certainty, the through-silicon vias must be created to penetrate not only the silicon substrate, but also the junction plane, and reach the deeply inner portions of the semiconductor elements.
FIGS. 1A and 1B are diagrams showing typical configurations of two semiconductor wafers used in a process of manufacturing an existing manufacturing device;
FIG. 2 is a diagram showing a configuration in which the two semiconductor wafers shown in FIGS. 1A and 1B are stuck to each other;
FIG. 3 is a diagram to be referred to in description of a process of creating a hole for a through-silicon via;
[Typical Configuration of the Existing Semiconductor Device]
Before a semiconductor device according to the present technology is explained, the following description explains an existing semiconductor device and a method for manufacturing the existing semiconductor device by taking an existing semiconductor device employed in a solid-state imaging device of the rear-surface radiation type as an example.
First of all, in a first process, a first semiconductor wafer 1 having a pixel array as shown in FIG. 1A and a second semiconductor wafer 2 having a logic circuit as shown in FIG. 1B are created. In the following description, the first semiconductor wafer 1 is also referred to as a CIS substrate 1 whereas the second semiconductor wafer 2 is also referred to as a logic substrate 2.