Array substrate and manufacturing method thereof

A manufacturing method of an array substrate, comprising steps of:

• forming a buffer layer on a substrate;
• forming a whole light-shading layer on the buffer layer, wherein the material of the light-shading layer is an amorphous silicon;
• oxidizing the light-shading layer, so as to form an insulation film on the light-shading layer;
• forming a whole semiconductor layer on the insulation film, and simultaneously patterning the semiconductor layer and the light-shading layer, wherein portions of the light-shading layer and portions of the semiconductor layer are covered on the buffer layer in order;
• and the semiconductor layer is configured to form a channel;
• forming a first insulation layer on the patterned semiconductor layer;
• forming a first metal layer on the first insulation layer, wherein the first metal layer is patterned to form gate electrodes and common electrodes;
• forming a second insulation layer on the first metal layer;
• disposing a third via on the second insulation layer which corresponds to the common electrodes, wherein the second metal layer is contacted with the common electrodes;
• forming a second metal layer on the second insulation layer, wherein the second metal layer is patterned to form drain electrodes and source electrodes;
• forming a flat layer on the second metal layer and the second insulation layer uncovered by the second metal layer, wherein a first via is formed on the flat layer;
• and
• forming a first transparent conductive layer on the flat layer, wherein the first transparent conductive layer is connected with the second metal layer through the first via.