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US 9,865,611 B2Granted
Multi-tiered semiconductor devices and associated methods
AssigneeMicron Technology, Inc.
InventorNishant Sinha
Life of this patent
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Abstract
Methods of fabricating multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, a first dielectric is formed, and a second dielectric is formed in contact with the first dielectric. A channel is formed through the first dielectric and the second dielectric with a first etch chemistry, a void is formed in the first dielectric with a second etch chemistry, and a device is formed at least partially in the void in the first dielectric. Additional embodiments are also described.
Claims17
An apparatus comprising:
- multiple vertically spaced tiers of a first dielectric interleaved with multiple tiers of a second dielectric, with devices formed in the respective tiers of the second dielectric, the devices being disposed between adjacent tiers of the first dielectric;
- and
- wherein the second dielectric has a hydrogen (H) or a hydroxyl ion (OH) concentration of greater than eight percent by weight and a higher wet etch rate than the wet etch rate of the first dielectric.
Dependencies are inferred from the claim text.