Method for constructing a distributed boundary clock over a dedicated communication channel
AssigneeQulsar, Inc.
InventorKishan Shenoi
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AssigneeQulsar, Inc.
InventorKishan Shenoi
Estimating the term…
A method for implementing a distributed boundary clock in situations where book-end devices such as microwave TX/RX pairs must collaborate in achieving PTP on-path support is described. A dedicated channel, generally low-speed compared to the main channel is used to transfer timing from the master side to the slave side using framing and super-framing applied to the digital channel. Time-stamps of events such as super-frame boundaries are communicated between the two sides to enable timing transfer.
A method, comprising synchronizing a first clock located at a receiving side to a second clock located at a sending side including aligning the first clock to the second clock by adjusting a frequency of the first clock using an estimate of a frequency error of the first clock δfm(i) based on change in time error from iteration to iteration where
Dependencies are inferred from the claim text.
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Synchronisation arrangements: synchronization between nodes
Synchronisation among TDM nodes: using timestamps
Using timestamps: bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
Synchronisation arrangements: detecting errors in frequency or phase
About 9 years 8 months of term left · ends 29 Jun 2036 (estimated)
Embodiments of the present invention relate generally to time and frequency alignment systems operating over packet-switched communications networks and, more specifically, to methods and apparatus for providing a distributed boundary clock function involving book-end units when there is a dedicated communication channel that is not packet-based between the two book-end units.
Packet-based timing methods are becoming essential for delivering timing over packet-switched networks, often referred to as the cloud. In particular, Precision Timing Protocol (PTP) (aka IEEE™ 1588-2008) is becoming popular for delivering timing information (time/phase/frequency) from a Grand Master (GM) clock to slave clocks in end application-specific equipment. For example, wireless base stations providing mobile telephony services require precise timing and the backhaul method of choice is Ethernet.
The Grand Master clock provides timing information over the packet-switched network to the slave clocks by exchanging packets with embedded time-stamps related to the time-of-arrival and time-of-departure of the timing packets. The slave clock utilizes this information to align its time (and frequency) with the Grand master. The Grand Master is provided an external reference to serve as the basis for time and frequency. Most commonly this reference is derived from a Global Navigation Satellite System (GNSS) such as the GPS System that in turn is controlled by the US Department of Defense and its timing controlled very precisely and linked to the US Naval Observatory. Time alignment to the GPS clock is, for all practical purposes equivalent to time alignment to UTC.
The drawings accompanying and forming part of this specification are included to depict certain embodiments of the present disclosure. A clearer concept of the embodiments described in this application will be readily apparent by referring to the exemplary, and therefore nonlimiting, embodiments illustrated in the drawings. The described embodiments may be better understood by reference to one or more of these drawings in combination with the following description presented herein. It should be noted that the features illustrated in the drawings are not necessarily drawn to scale.
FIG. 1 is a simplified view of underlying scheme for transmitting information over a digital channel showing one direction of transmission. There are two channels, one is the primary wide-band channel and the other is a narrowband channel. The narrowband channel is used to transfer timing from master-side to slave-side over a framed digital channel.
FIG. 2 shows the structure of a serialized bit stream that is framed and super-framed following the DS1 standard.
The concept of transmitting information over a digital channel is depicted in FIG. 1. For convenience, only one direction of transmission is shown. The premise is that one side of the link is considered the master and the other side of the link is the slave side and the intent is to synchronize the slave clock to the master clock. For simplicity of explanation it is assumed that the link is a T1 (1.544 Mbps) and is directly point-to-point. Such a direct point-to-point arrangement is very common, especially in microwave transmission systems wherein a secondary or “side-channel” is maintained continuously in parallel with the main or primary (wide-band) channel.
FIG. 1 identifies the two channels of communication. The first is the primary, or wide-band, channel denoted by 160 on the transmit side (TX) and 170 on the receive side (RX). The second is generally a low-speed or narrow-band channel. In digital microwave systems the primary channel generally supports a wide-band stream of several hundred megabits/second. The secondary channel is relatively narrow-band, typically 1.5 to 2 Megabits/second and is often called a “wayside channel”. In this invention it is the wayside channel that is used to transfer timing from the “master” to the “slave”. Whereas this terminology is conventional, it should be recognized that in a distributed boundary clock scenario the “master” side of timing transfer over the wayside channel is actually the slave side of the distributed PTP boundary clock whereas the slave side of the timing transfer over the wayside channel is the master side of the distributed PTP boundary clock.
As with all serialized digital communication, the information that needs to be transmitted, TX INFO 110, is encapsulated in a frame structure. In keeping with the example of DS1 (1.544 Mbps, also referred to as T1) transmission considered here, the frame structure is developed by considering blocks of 192 bits (24 octets) and prepending a framing bit (usually denoted by “F”) thereby making each frame 193 bits in size. This is achieved in the DS1 framing device, FRM GEN 115. The frame rate is 8000 frames per second (i.e. 8 kHz) and consequently the serialized bit stream, TX BIT STREAM 130, has an inherent bit rate of 1.544 Mbps (193×8 kHz). The actual rate of transmission is controlled by the transmit clock signal (TX CLK SIG 120). Most DS1 framing devices permit external control of the framing procedure by accepting a framing signal, TX FRM 125, that is an 8 kHz pulse train that is frequency and phase aligned with the transmit clock signal, TX CLK SIG 120. In other DS1 framing devices the frame structure is developed autonomously and in that case the framing device, FRM GEN 115, provides an output signal equivalent to the transmit framing signal (TX FRM 125). In either case a signal is available that identifies when the start of the frame, namely the framing (“F”) bit is present in the signal transmitted, TX BIT STREAM 130.