Schottky-CMOS asynchronous logic cells
AssigneeSchottky Lsi, Inc.
InventorsAugustine Wei-Chun Chang, Pierre Dermy
Life of this patent
Estimating the term…
Abstract
Integrated circuits described herein implement an x-input logic gate. The integrated circuit includes a plurality of Schottky diodes that includes x Schottky diodes and a plurality of source-follower transistors that includes x source-follower transistors. Each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode. A first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.
Claims19
An integrated circuit implementing a NAND gate system, the integrated circuit comprising:
- a first input coupled to a cathode of a first p-type Schottky diode;
- x additional inputs coupled to x respective cathodes of x additional p-type Schottky diodes;
- a first n-type transistor including a gate node that is coupled to an anode of the first Schottky diode and x respective anodes of the x additional Schottky diodes;
- and
- a p-type transistor including a gate node that is coupled to the anode of the first Schottky diode and x respective anodes of the x additional Schottky diodes;
- a second n-type transistor including a gate node that is coupled to the cathode of the first p-type Schottky diode;
- and
- x additional n-type transistors including x respective gate nodes that are coupled to the x respective cathodes of the x additional p-type Schottky diodes;
- wherein an output is coupled to a non-gate node of the first n-type transistor and a non-gate node of the p-type transistor.
An integrated circuit implementing a NOR gate system, the integrated circuit comprising:
- a first input coupled to an anode of a first n-type Schottky diode;
- x additional inputs coupled to x respective anodes of x additional n-type Schottky diodes;
- a first p-type transistor including a gate node that is coupled to a cathode of the first n-type Schottky diode and a cathode of the x additional n-type Schottky diodes;
- and
- an n-type transistor including a gate node that is coupled to the cathode of the first n-type Schottky diode and the cathodes of the x additional n-type Schottky diodes;
- a second p-type transistor including a gate node that is coupled to the anode of the first n-type Schottky diode;
- and
- x additional p-type transistors including x respective gate nodes that are coupled to the x respective anodes of the x additional n-type Schottky diodes;
- wherein an output is coupled to a non-gate node of the first p-type transistor and a non-gate node of the n-type transistor.
An integrated circuit implementing an x-input logic gate, the integrated circuit comprising:
- a plurality of Schottky diodes that includes x Schottky diodes;
- and
- a plurality of source-follower transistors that includes x source-follower transistors, wherein:
- each respective source-follower transistor of the plurality of source-follower transistors includes a respective gate node that is coupled to a respective Schottky diode;
- and
- a first source-follower transistor of the plurality of source-follower transistors is connected serially to a second source-follower transistor of the plurality of source-follower transistors.
Dependencies are inferred from the claim text.