Load control device for high-efficiency loads

A load control device for controlling power delivered from an AC power source to an electrical load, the load control device comprising:

• a thyristor adapted to be electrically coupled between the AC power source and the electrical load, the thyristor having first and second main terminals through which current can be conducted to energize the electrical load and a gate terminal through which current can be conducted to render the thyristor conductive;
• a gate coupling circuit configured to receive first and second drive voltages, the gate coupling circuit comprising two MOS-gated transistors electrically coupled in anti-series connection, the MOS-gated transistors electrically coupled to conduct current through the gate terminal of the thyristor in response to the first and second drive voltages;
• and
• a control circuit configured to generate the first and second drive voltages for individually controlling the MOS-gated transistors of the gate coupling circuit, the control circuit being configured to control the gate coupling circuit to cause the MOS-gated transistors to conduct a pulse of current through the gate terminal of the thyristor at a firing time during a present half-cycle of the AC power source to render the thyristor conductive, the control circuit being further configured to control the gate coupling circuit to allow the MOS-gated transistors to conduct at least one other pulse of current through the gate terminal of the thyristor after the firing time during the present half-cycle;
• wherein the control circuit is configured to render both of the MOS-gated transistors conductive at the firing time;
• wherein the control circuit is configured to render a first one of the MOS-gated transistors non-conductive prior to an end of the present half-cycle, and to render a second one of the MOS-gated transistors non-conductive after the end of the present half-cycle;
• wherein the control circuit is configured to prevent the gate coupling circuit from conducting any further pulses of gate current through the gate terminal of the thyristor between a second time and the end of the present half-cycle to allow the thyristor to become non-conductive and remain non-conductive until the end of the present half-cycle;
• and
• wherein the control circuit is configured to control the gate coupling circuit to prevent the thyristor from becoming conductive until the control circuit controls the MOS-gated transistors to render the thyristor conductive during a next half-cycle.

A load control device for controlling an amount of power delivered from an AC power source to an electrical load, the load control device comprising:

• a thyristor adapted to be electrically coupled between the AC power source and the electrical load, the thyristor having first and second main terminals through which current can be conducted to energize the electrical load and a gate terminal through which current can be conducted to render the thyristor conductive;
• a gate coupling circuit configured to receive first and second drive voltages, the gate coupling circuit comprising two MOS-gated transistors electrically coupled in anti-series connection, the MOS-gated transistors electrically coupled to conduct current through the gate terminal of the thyristor in response to the first and second drive voltages;
• and
• a control circuit configured to generate the first and second drive voltages for controlling the MOS-gated transistors of the gate coupling circuit, the control circuit being configured to control the gate coupling circuit to cause the MOS-gated transistors to conduct a pulse of current through the gate terminal of the thyristor at a firing time during a present half-cycle of the AC power source to render the thyristor conductive, the control circuit being further configured to control the gate coupling circuit to allow the MOS-gated transistors to conduct at least one other pulse of current through the gate terminal of the thyristor after the firing time during the present half-cycle;
• wherein the control circuit is configured to render a first one of the MOS-gated transistors non-conductive prior to the end of the present half-cycle, and to render a second one of the MOS-gated transistors non-conductive after the end of the present half-cycle.