MOS devices having epitaxy regions with reduced facets

A semiconductor device comprising:

• a semiconductor substrate;
• a transistor at a top surface of the semiconductor substrate, wherein the transistor comprises:
• a gate stack;
• and
• a source/drain region comprising:
• a first germanium-containing semiconductor region;
• a second germanium-containing semiconductor region on the first germanium-containing semiconductor region, wherein the second germanium-containing semiconductor region has a higher germanium percentage than the first germanium-containing semiconductor region;
• and
• a capping layer on the second germanium-containing semiconductor region, wherein the capping layer has a lower germanium percentage than the second germanium-containing semiconductor region;
• and
• a silicide region extending into the capping layer, wherein a line parallel to a major surface of the semiconductor substrate extends from a first portion of the capping layer through the silicide region to a second portion of the capping layer, and wherein a germanium percentage of the silicide region is greater than a silicon percentage of the silicide region.

A transistor comprising:

• a gate stack;
• and
• a source/drain region comprising:
• a first silicon germanium region having a first germanium percentage;
• a second silicon germanium region over the first silicon germanium region and having a second germanium percentage greater than the first germanium percentage;
• a capping layer over the second silicon germanium region, wherein a germanium percentage throughout the source/drain region is highest at an interface between the second silicon germanium region and the capping layer;
• and
• a silicide extending into at least the capping layer, wherein the silicide comprises a higher germanium percentage than the capping layer.