Method of manufacturing a trench FET having a merged gate dielectric
AssigneeInfineon Technologies Americas Corp.
InventorLing Ma
Life of this patent
Estimating the term…
Abstract
In one implementation, a method for fabricating a trench FET includes providing a semiconductor substrate including a drain region and a drift zone over the drain region, forming a plurality of depletion trenches over the drain region, each of the plurality of depletion trenches having a depletion trench dielectric and a depletion electrode, and forming a respective bordering gate trench alongside each of the plurality of depletion trenches, each bordering gate trench having a gate electrode and a gate dielectric.
Claims19
A method for fabricating a trench FET, said method comprising:
- providing a semiconductor substrate including a drain region, and a drift zone over said drain region;
- forming a plurality of depletion trenches over said drain region, each of said plurality of depletion trenches having a depletion trench dielectric and a depletion electrode;
- and
- forming a bordering gate trench alongside each of the depletion trenches in said plurality, each said bordering gate trench having a gate electrode and a gate dielectric,
- wherein forming the bordering gate trench alongside each of the depletion trenches in said plurality comprises forming only one bordering gate trench situated alongside each of the depletion trenches in said plurality.
A method for fabricating a trench FET, said method comprising:
- forming a plurality of depletion trench structures in a semiconductor substrate, each of said plurality of depletion trench structures having a depletion electrode and a depletion trench dielectric disposed in a depletion trench formed in said semiconductor substrate;
- and
- forming a bordering gate trench structure directly adjacent each of said plurality of depletion trench structures in said plurality, each said bordering gate trench structure having a gate electrode and a gate dielectric disposed in a gate trench formed in said semiconductor substrate, each said depletion trench extending deeper into said semiconductor substrate than said respective gate trench,
- wherein forming the bordering gate trench structure directly adjacent each of said plurality of depletion trench structures in said plurality comprises:
- for each of the plurality of bordering gate trench structures, etching said bordering gate trench structures into said semiconductor substrate so that a region of semiconductor material remains between each depletion trench structure and each bordering gate trench structure;
- and
- oxidizing said region of semiconductor material between each said depletion trench structure and each said gate bordering trench structure during formation of said gate dielectric, so that no semiconductor material remains between said depletion trench structures and said gate dielectric.
Dependencies are inferred from the claim text.