Method of manufacturing high resistivity silicon-on-insulator substrate
AssigneeSunEdison Semiconductor Limited (UEN201334164H)
InventorsShawn George Thomas, Qingmin Liu
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Abstract
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a silicon dioxide layer on the surface of the semiconductor handle substrate; a carbon-doped amorphous silicon layer in contact with the silicon dioxide layer; a dielectric layer in contact with the carbon-doped amorphous silicon layer; and a semiconductor device layer in contact with the dielectric layer.
Claims32
A multilayer structure comprising:
- a semiconductor handle substrate comprising two major, generally parallel surfaces, one of which is a front surface of the semiconductor handle substrate and the other of which is a back surface of the semiconductor handle substrate, a circumferential edge joining the front and back surfaces of the semiconductor handle substrate, and a bulk region between the front and back surfaces of the semiconductor handle substrate, wherein the semiconductor handle substrate has a bulk region resistivity between 2000 Ohm-cm and about 100,000 Ohm-cm;
- an interfacial layer in contact with the front surface of the semiconductor handle substrate wherein the interfacial layer comprises a material selected from the group consisting of silicon dioxide, silicon nitride, and silicon oxynitride;
- a carbon-doped amorphous silicon layer in contact with the interfacial layer, wherein the carbon-doped amorphous silicon layer has an average thickness of between about 25 nanometers and about 7500 nanometers and further wherein the carbon-doped amorphous silicon layer comprises a carbon concentration between about 1% and 10% on an atomic basis;
- a dielectric layer in contact with the carbon-doped amorphous silicon layer;
- and
- a semiconductor device layer in contact with the dielectric layer.
A method of forming a multilayer structure, the method comprising:
- forming an interfacial layer on a front surface of a semiconductor handle substrate, wherein the semiconductor handle substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor handle substrate and the other of which is a back surface of the semiconductor handle substrate, a circumferential edge joining the front and back surfaces of the semiconductor handle substrate, and a bulk region between the front and back surfaces of the semiconductor handle substrate, wherein the semiconductor handle substrate has a bulk region resistivity between 2000 Ohm-cm and about 100,000 Ohm-cm and the interfacial layer has a thickness between about 1 nanometer and about 5 nanometers and further wherein the interfacial layer comprises a material selected from the group consisting of silicon dioxide, silicon nitride, and silicon oxynitride;
- forming a carbon-doped amorphous silicon layer on the interfacial layer on the front surface of the semiconductor handle substrate, wherein the carbon-doped amorphous silicon layer has an average thickness of between about 25 nanometers and about 7500 nanometers and further wherein the carbon-doped amorphous silicon layer comprises a carbon concentration between about 1% and 10% on an atomic basis;
- and
- bonding a dielectric layer on a front surface of a semiconductor donor substrate to the carbon-doped amorphous silicon layer to thereby form a bonded structure, wherein the semiconductor donor substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor donor substrate and the other of which is a back surface of the semiconductor donor substrate, a circumferential edge joining the front and back surfaces of the semiconductor donor substrate, and a central plane between the front and back surfaces of the semiconductor donor substrate.
Dependencies are inferred from the claim text.