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US 9,853,113 B2Granted
Semiconductor device
AssigneeUnisantis Electronics Singapore Pte. Ltd.
InventorsFujio Masuoka, Nozomu Harada, Hiroki Nakamura
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Abstract
A semiconductor device includes a first planar semiconductor (e.g., silicon) layer, first and second pillar-shaped semiconductor (e.g., silicon) layers, a first gate insulating film, a first gate electrode, a second gate insulating film, a second gate electrode, a first gate line connected to the first and second gate electrodes, a first n-type diffusion layer, a second n-type diffusion layer, a first p-type diffusion layer, and a second p-type diffusion layer. A center line extending along the first gate line is offset by a first predetermined amount from a line connecting a center of the first pillar-shaped semiconductor layer and a center of the second pillar-shaped semiconductor layer.
Claims4
A semiconductor device, comprising:
- a first planar silicon layer in a first row of coordinates of rows and columns on a substrate extending in a row direction;
- a first pillar-shaped silicon layer on the first planar silicon layer in the first row and a first column of the coordinates;
- a first portion of a gate insulating film around the first pillar-shaped silicon layer;
- a first portion of a agate electrode around the first portion of the gate insulating film;
- a first second-conductivity-type diffusion layer in an upper portion of the first pillar-shaped silicon layer;
- a second second-conductivity-type diffusion layer over a lower portion of the first pillar-shaped silicon layer and an upper portion of the first planar silicon layer;
- a second pillar-shaped silicon layer on the first planar silicon layer in the first row and the second column of the coordinates;
- a second portion of the gate insulating film around the second pillar-shaped silicon layer;
- a second portion of the gate electrode around the second gate insulating film;
- a first first-conductivity-type diffusion layer in an upper portion of the second pillar-shaped silicon layer;
- a second first-conductivity-type diffusion layer over a lower portion of the second pillar-shaped silicon layer and an upper portion of the first planar silicon layer;
- a third pillar-shaped silicon layer on the first planar silicon layer in the first row and the third column of the coordinates;
- a third gate insulating film around the third pillar-shaped silicon layer;
- a third gate electrode around the third gate insulating film;
- a third second-conductivity-type diffusion layer in an upper portion of the third pillar-shaped silicon layer;
- a fourth second-conductivity-type diffusion layer over a lower portion of the third pillar-shaped silicon layer and an upper portion of the first planar silicon layer;
- a first gate line connected to the first and second gate electrodes;
- a fifth planar silicon layer in the a second row of the coordinates on the substrate;
- a fifth pillar-shaped silicon layer on the fifth planar silicon layer in the second row and the first column of the coordinates;
- a first portion of a fifth gate insulating film around the fifth pillar-shaped silicon layer;
- a first portion of a fifth gate electrode around the fifth gate insulating film;
- a fifth second-conductivity-type diffusion layer in an upper portion of the fifth pillar-shaped silicon layer;
- a sixth second-conductivity-type diffusion layer over a lower portion of the fifth pillar-shaped silicon layer and an upper portion of the fifth planar silicon layer;
- a sixth pillar-shaped silicon layer on the fifth planar silicon layer in the second row and the second column of the coordinates;
- a second portion of the fifth gate insulating film around the sixth pillar-shaped silicon layer;
- a second portion of fifth gate electrode around the sixth gate insulating film;
- a fifth first-conductivity-type diffusion layer in an upper portion of the sixth pillar-shaped silicon layer;
- a sixth first-conductivity-type diffusion layer over a lower portion of the sixth pillar-shaped silicon layer and an upper portion of the fifth planar silicon layer;
- a seventh pillar-shaped silicon layer on the fifth planar silicon layer in the second row and the third column of the coordinates;
- a seventh gate insulating film around the seventh pillar-shaped silicon layer;
- a seventh gate electrode around the seventh gate insulating film;
- a seventh second-conductivity-type diffusion layer in an upper portion of the seventh pillar-shaped silicon layer;
- an eighth second-conductivity-type diffusion layer over a lower portion of the seventh pillar-shaped silicon layer and an upper portion of the fifth planar silicon layer;
- and
- a fifth gate line connected to the sixth and seventh gate electrodes, wherein a center line extending along the first gate line is offset toward the second row of the coordinates by a first predetermined amount from a line connecting a center of the first pillar-shaped silicon layer and a center of the second pillar-shaped silicon layer to expose a first offset region;
- a first silicide connection residing in the first offset region;
- a center line extending along the fifth gate line is offset toward the first row of the coordinates by a second predetermined amount from a line which connects a center of the sixth pillar-shaped silicon layer and a center of the seventh pillar-shaped silicon layer to expose a second offset region, the first predetermined amount equaling the second predetermined amount;
- and
- a second silicide connection residing in the second offset region.
36 more elements
Dependencies are inferred from the claim text.