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US 9,853,112 B2Granted
Device and method to connect gate regions separated using a gate cut
AssigneeQUALCOMM Incorporated
InventorsYanxiang Liu, Stanley Seungchul Song, Kern Rim
Life of this patent
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Abstract
A method of fabrication of a device includes performing a gate cut to cut a gate line to create a first gate region and a second gate region. The method further includes depositing a conductive material to form a conductive jumper structure to connect the first gate region and the second gate region.
Claims15
An apparatus comprising:
- a first device including a first gate region;
- a second device including a second gate region, the first gate region and the second gate region formed from a first gate line;
- a conductive jumper structure coupling the first gate region and the second gate region;
- a first dummy device having a gate terminal formed from a second gate line, the first dummy device adjacent to the first device and the second gate line proximate to the first gate line;
- a second dummy device having a gate terminal formed from a third gate line, the second dummy device adjacent to the first device and the third gate line proximate to the first gate line, wherein the first gate line is located between the second gate line and the third gate line, wherein each of the first gate line, the second gate line, and the third gate line have a gate cut;
- and
- a first dielectric material within a region defined by the gate cut of the first gate line, the first dielectric material adjoining the first gate region and the second gate region, and including a first surface, the first surface of the first dielectric material, a surface of the first gate region, and a surface of the second gate region defining a planarized surface.
4 more elements
An apparatus comprising:
- a first gate line, wherein the first gate line includes a first gate region of a first fin field-effect transistor (finFET) and a second gate region of a second finFET;
- a conductive jumper structure coupling the first gate region of the first finFET and the second gate region of the second finFET, wherein the first gate line has a gate cut;
- a substrate;
- a first dielectric material on the substrate and adjoining a first fin of the first finFET and a second fin of the second finFET;
- and
- a second dielectric material within a region defined by the gate cut, the second dielectric material in contact with the first dielectric material, adjoining the first gate region and the second gate region, and including a first surface, the first surface of the second dielectric material, a surface of the first gate region, and a surface of the second gate region defining a planarized surface,
- wherein the conductive jumper structure is in contact with the second dielectric material.
4 more elements
Dependencies are inferred from the claim text.