Method of forming a gate contact structure for a semiconductor device
AssigneeGlobalfoundries Inc.
InventorsXunyuan Zhang, Ruilong Xie, Sean X. Lin
Life of this patent
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Abstract
One illustrative method disclosed includes, among other things, forming a gate contact opening in a layer of insulating material, performing at least one etching process through the gate contact opening to remove a gate cap layer and to expose the gate structure, selectively growing a metal material that is conductively coupled to an upper surface of the gate structure such that the grown metal material contacts all of the sidewalls of the gate contact opening and an air space is formed between a bottom of the grown metal material and a conductive source/drain structure, and forming one or more conductive materials in the gate contact opening above the grown metal material.
Claims18
A method of forming a gate contact for a gate structure of a transistor device formed above an active region defined in a semiconductor substrate, said transistor device comprising a source/drain region, a gate structure including a gate insulation layer and a conductive gate material and having a gate cap layer positioned above an upper surface of said conductive gate material and a sidewall spacer positioned adjacent first and second opposing sides of said gate structure, said gate insulation layer being disposed between said conductive gate material and said sidewall spacer on sidewalls of said conductive gate material, the method comprising:
- forming an initial conductive source/drain structure that is conductively coupled to said source/drain region of said transistor device;
- performing a recess etching process on said initial conductive source/drain structure to thereby define a recessed conductive source/drain structure having a recessed upper surface that is positioned at a level that is approximately even with or below a level of said upper surface of said conductive gate material;
- forming a layer of insulating material above said gate structure, said gate cap layer, said sidewall spacer, and said upper surface of said recessed conductive source/drain structure;
- etching said layer of insulating material to form a gate contact opening in said layer of insulating material, said gate contact opening having sidewalls;
- performing at least one etching process through said gate contact opening to remove said gate cap layer and at least a portion of said sidewall spacer on each of said first and second opposing sides of said gate structure to expose at least a portion of said gate structure, including said upper surface of said conductive gate material and sidewall surfaces of said gate insulation layer, and to expose a sidewall portion of said recessed conductive source/drain structure;
- performing at least one first plating operation through said gate contact opening to selectively grow a metal material on said upper surface of said conductive gate material such that said grown metal material contacts said sidewalls of said gate contact opening disposed above said upper surface of said conductive gate material and an air space is defined by a bottom surface of said grown metal material and said exposed sidewall portion of said recessed conductive source/drain structure;
- and
- forming one or more conductive materials in said gate contact opening above said grown metal material.
A method of forming a gate contact for a gate structure of a transistor device including a source/drain region formed above an active region defined in a semiconductor substrate, said gate structure including a gate insulation layer and a conductive gate material and having a gate cap layer positioned above an upper surface of said conductive gate material and a sidewall spacer positioned adjacent first and second opposing sides of said gate structure, said gate insulation layer being disposed between said conductive gate material and said sidewall spacer on sidewalls of said conductive gate material, the method comprising:
- forming an initial conductive source/drain structure that is conductively coupled to said source/drain region of said transistor device;
- performing a recess etching process on said initial conductive source/drain structure to thereby define a recessed conductive source/drain structure having a recessed upper surface that is positioned at a level that is approximately even with or below a level of said upper surface of said conductive gate material;
- forming a layer of insulating material above said gate structure, said gate cap layer, said upper surface of said recessed conductive source/drain structure, and said sidewall spacer;
- etching said layer of insulating material to form a gate contact opening in said layer of insulating material, said gate contact opening having sidewalls;
- performing at least one etching process through said gate contact opening to remove said gate cap layer and to recess any exposed portions of said sidewall spacer on each of said first and second opposing sides of said gate structure so as to expose at least said upper surface of said conductive gate material, sidewall surfaces of said gate insulation layer, and a sidewall portion of said recessed conductive source/drain structure, wherein said recessed portion of said sidewall spacer has a recessed upper surface that is positioned at a level that is below a level of said exposed upper surface of said conductive gate material;
- performing a first plating operation through said gate contact opening to selectively form a layer comprising a noble metal on said exposed upper surface of said conductive gate material;
- performing a second plating operation through said gate contact opening to selectively grow a metal material on said layer comprising said noble metal such that said grown metal material contacts said sidewalls of said gate contact opening disposed above said upper surface of said conductive gate material and an air space is defined by a bottom surface of said grown metal material, said exposed sidewall portion of said recessed conductive source/drain structure, and said recessed upper surface of said recessed sidewall spacer;
- and
- forming one or more conductive materials in said gate contact opening above said grown metal material.
Dependencies are inferred from the claim text.