III-V MOSFET with self-aligned diffusion barrier
AssigneeInternational Business Machines Corporation
InventorsKevin K. Chan, Cheng-Wei Cheng, Jack Oon Chu, Yanning Sun, Jeng-Bang Yau
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AssigneeInternational Business Machines Corporation
InventorsKevin K. Chan, Cheng-Wei Cheng, Jack Oon Chu, Yanning Sun, Jeng-Bang Yau
Estimating the term…
A method is presented for forming a diffusion barrier in a field effect transistor with a source. A raised source is formed at least partially on the source with the raised source comprising III-V material. An interfacial layer is formed at least partially on the raised source with the interfacial layer comprising silicon or germanium. A metal layer is formed at least partially on the interfacial layer with the metal layer comprising transition metal. The diffusion barrier is formed at least partially on the raised source with the diffusion barrier layer comprising transition metal from the metal layer bonded to silicon or germanium from the interfacial layer. Similar processing forms a corresponding diffusion barrier on a raised drain.
A method for forming a field effect transistor with an implanted source, the method comprising the steps of:
A field effect transistor with an implanted source, the field effect transistor comprising:
Dependencies are inferred from the claim text.