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US 9,853,106 B2Granted
Nano-structure assembly and nano-device comprising same
AssigneeSnu R&Db Foundation
InventorsGyu Chul Yi, Hong Seok Oh
Life of this patent
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Abstract
Provided are a nano-structure assembly including an insulating substrate; and a nano-structure formed on the insulating substrate, and a nano-device including the same.
Claims11
A nano-structure assembly comprising:
- an insulating substrate;
- and
- a plurality of nano-structures directly disposed on the insulating substrate;
- and
- a semiconductor layer covering the plurality of nano-structures,
- wherein the insulating substrate includes hexagonal boron nitride (h-BN),
- wherein the plurality of nano-structures includes a semiconductor,
- wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater,
- wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures,
- wherein the plurality of nano-structures is embedded in the semiconductor layer.
7 more elements
A nano-device comprising:
- an insulating substrate;
- a plurality of nano-structures disposed on one surface of the insulating substrate;
- a semiconductor layer covering the plurality of nano-structures,
- a source electrode and a drain electrode, disposed on the semiconductor layer;
- and
- a gate electrode disposed on the other surface of the insulating substrate,
- wherein the insulating substrate includes hexagonal boron nitride (h-BN),
- wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater,
- wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures,
- wherein the plurality of nano-structures is embedded in the semiconductor layer.
7 more elements
A nano-device comprising:
- an insulating substrate;
- a plurality of nano-structures disposed on one surface of the insulating substrate;
- a semiconductor layer covering the plurality of nano-structures;
- and
- a source electrode, a drain electrode and a gate electrode which are disposed on the insulating substrate,
- wherein a part of the insulating substrate corresponding to the source electrode and the drain electrode is etched,
- wherein the insulating substrate includes hexagonal boron nitride (h-BN),
- wherein the insulating substrate has a thickness in the range of 0.35 nm to 100 nm and a sheet resistance in the range of 1 GΩ/□ or greater,
- wherein a length of the plurality of nano-structures is larger than the thickness of the plurality of nano-structures,
- wherein the plurality of nano-structures is embedded in the semiconductor layer.
7 more elements
Dependencies are inferred from the claim text.