Tunnel field-effect transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTeng-Chun Tsai, Li-Ting Wang, Cheng-Tung Lin, De-Fang Chen, Chih-Tang Peng, Chien-Hsun Wang, Hung-Ta Lin
Life of this patent
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Abstract
A tunnel field-effect transistor and method fabricating the same are provided. The tunnel field-effect transistor includes a drain region, a source region with opposite conductive type to the drain region, a channel region disposed between the drain region and the source region, a metal gate layer disposed around the channel region, and a high-k dielectric layer disposed between the metal gate layer and the channel region.
Claims20
A tunnel field-effect transistor comprising:
- a substrate;
- a semiconductor column protruding from the substrate;
- a drain region disposed as a first portion of the semiconductor column;
- a source region disposed as a second portion of the semiconductor column, wherein the drain and source regions are of opposite conductive types;
- a channel region disposed as a third portion of the semiconductor column and between the drain region and the source region;
- a metal gate layer surrounding the channel region;
- a high-k dielectric layer disposed between the metal gate layer and the channel region;
- a sidewall spacer disposed around the source region;
- and
- a gate contact connected to the metal gate layer, wherein the gate contact is in contact with the sidewall spacer and is self-aligned by the sidewall spacer.
A tunnel field-effect transistor component comprising:
- a substrate having a first-type well, a second-type well, and a shallow trench isolation feature separating the first-type well and the second-type well;
- a first-type tunnel field-effect transistor disposed on the second-type well, the first-type tunnel field-effect transistor comprising:
- a first-type drain region;
- a second-type source region;
- a first-type channel region disposed between the first-type drain region and the second-type source region;
- a first metal gate layer encircling the first-type channel region;
- and
- a first high-k dielectric layer disposed between the first metal gate layer and the first-type channel region;
- a first work function metal layer disposed between the first high-k dielectric layer and the first metal gate layer;
- and
- a second-type tunnel field-effect transistor disposed on the first-type well, the second-type tunnel field-effect transistor comprising:
- a second-type drain region;
- a first-type source region;
- a second-type channel region disposed between the second-type drain region and the first-type source region;
- a second metal gate layer encircling the second-type channel region;
- and
- a second high-k dielectric layer disposed between the second metal gate layer and the second-type channel region.
A tunnel field-effect transistor comprising:
- a substrate;
- a drain region on the substrate;
- a source region above the drain region, wherein the drain and source regions are of opposite conductive types;
- a channel region between the drain region and the source region;
- an insulation layer surrounding the drain region;
- an etch stop layer between the drain region and the insulation layer and surrounding the drain region;
- and
- a gate dielectric layer surrounding the channel region and above the etch stop layer.
Dependencies are inferred from the claim text.