High voltage device and manufacturing method thereof
AssigneeRichtek Technology Corporation
InventorsTsung-Ying Tsai, Kun-Hun You, Tsung-Yi Huang
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Abstract
The present invention provides a high voltage device and manufacturing method thereof. The high voltage device includes: a semiconductor substrate, an isolation structure, a gate, a body region, a well, a source, a drain and a lightly doped diffusion (LDD) region. The isolation structure is formed on an upper surface of the semiconductor substrate, for defining a device region, The LDD region is formed on the well in the device region. In a lateral direction, the LDD region is located between the gate and the drain, and the LDD region is not in direct contact with the drain.
Claims14
A high voltage device, comprising:
- a semiconductor substrate, which includes a top surface and a bottom surface opposite to the top surface in a vertical direction;
- an isolation structure, which is formed on the top surface of the semiconductor substrate to define a device region;
- a gate, which is formed on the top surface of the semiconductor substrate in the device region;
- a body region with a first conductive type, which is formed in the device region beneath the top surface of the semiconductor substrate, and a part of the body region is located right below the gate;
- a well with a second conductive type, which is formed below the top surface of the semiconductor substrate in the device region, and directly connects the body region in a lateral direction to form a junction, wherein the junction is located right below the gate;
- a source and a drain, with the second conductive type, which are formed beneath the top surface of the semiconductor substrate in the device region, and are located respectively at two lateral sides of the gate, relatively nearer and farther to the body region respectively, wherein the drain and the gate are separated by the well;
- and
- a lightly doped diffusion (LDD) region with the first conductive type, which is formed beneath the top surface above the well in the device region, wherein the LDD region is located between the gate and the drain in the lateral direction, and the LDD region is not in direct contact with the drain.
A manufacturing method of a high voltage device, comprising:
- providing a semiconductor substrate, which includes a top surface and a bottom surface opposite to the top surface in a vertical direction;
- forming an isolation structure on the top surface of the semiconductor substrate to define a device region;
- forming a gate on the top surface of the semiconductor substrate in the device region;
- forming a body region with a first conductive type, in the device region beneath the top surface of the semiconductor substrate, wherein a part of the body region is located right below the gate;
- forming a well with a second conductive type, below the top surface of the semiconductor substrate in the device region, which directly connects the body region in a lateral direction to form a junction, wherein the junction is located right below the gate;
- forming a source and a drain, with the second conductive type, which are formed beneath the top surface of the semiconductor substrate in the device region, and are located respectively at two lateral sides of the gate, relatively nearer and farther to the body region respectively, wherein the drain and the gate are separated by the well;
- forming a lightly doped diffusion (LDD) region with the first conductive type, which is formed beneath the top surface above the well in the device region, wherein the LDD region is located between the gate and the drain, and the LDD region is not in direct contact with the drain.
Dependencies are inferred from the claim text.