Strained CMOS on strain relaxation buffer substrate

A method for fabricating a FinFET device comprising:

• providing a set of silicon fins for n-type FinFET devices and a set of silicon germanium fins for p-type FinFET devices on a strain relaxation buffer (SRB) substrate;
• cutting each fin in the set of silicon fins forming a set of cut silicon fins having a set of vertical faces, each vertical face at a fin end of a respective cut silicon fin;
• cutting the set of silicon germanium fins forming a set of cut silicon germanium fins having a set of vertical faces, each vertical face at a fin end of a respective cut silicon germanium fin;
• forming a set of tensile dielectric structures which respectively contact the vertical faces of respective fin ends of the cut silicon fins to maintain tensile strain at the fin ends of the set of cut silicon fins;
• and
• forming a set of compressive dielectric structures which respectively contact the vertical faces of respective fin ends of the cut silicon germanium fins to maintain compressive strain at the fin ends of the set of cut silicon germanium fins;
• depositing a shallow trench isolation layer over the set of silicon fins for n-type FinFET devices, the set of silicon germanium fins for p-type FinFET devices and the strain relaxation buffer (SRB) substrate;
• performing a planarization step on the shallow trench isolation layer to produce a top surface coplanar with a hardmask layer disposed on the set of silicon fins for n-type FinFET devices and the set of silicon germanium fins for p-type FinFET devices;
• forming a first fin cut mask on the top surface for cutting each fin in the set of silicon germanium fins, wherein the first fin cut mask protects the set of silicon fins;
• and
• forming a second fin cut mask on the top surface for cutting each fin in the set of silicon fins, wherein the second fin cut mask protects the set of silicon germanium fins.