Three dimension integrated circuits employing thin film transistors
Assignee3B Technologies, Inc.
InventorsJames John Lupino, Tommy Allen Agan
Life of this patent
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Abstract
An integrated circuit which enables lower cost yet provides superior performance compared to standard silicon integrated circuits by utilizing thin film transistors (TFTs) fabricated in BEOL. Improved memory circuits are enabled by utilizing TFTs to improve density and access in a three dimensional circuit design which minimizes die area. Improved I/O is enabled by eliminating the area on the surface of the semiconductor dedicated to I/O and allowing many times the number of I/O available. Improved speed and lower power are also enabled by the shortened metal routing lines and reducing leakage.
Claims17
An integrated circuit device, comprising
- at least one memory array layer arranged in a matrix and comprising a plurality of parallel first conductive lines, a plurality of parallel second conductive lines overlapping the first conductive lines at a plurality of intersection regions, a plurality of memory cells, each memory cell being disposed at an intersection region of the conductive lines, electrically coupled to one of the first conductive lines at a first terminal and to one of the second conductive lines at a second terminal, and comprising a controllable electrical resistance,
- whereby each conductive line of the first conductive lines or the second conductive lines or both first and second conductive lines, is electrically coupled to at least one thin film transistor of a thin film transistor layer, which is positioned directly above the memory array layer.
Dependencies are inferred from the claim text.