Semiconductor device having channel holes
AssigneeSamsung Electronics Co., Ltd.
InventorsSung Min Hwang, Jang Gn Yun, Ahn Sik Moon, Se Jun Park, Zhiliang Xia, Joon Sung Lim
Life of this patent
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Abstract
A semiconductor device includes a gate stack including gate electrodes stacked vertically on a substrate. Channel holes penetrate through the gate stack to extend vertically to the substrate. Each of the channel holes includes a channel region. First channel pads are each disposed at an end of a respective channel hole opposite the substrate. Each of the first channel pads includes at least one first conductivity-type impurity. Second channel pads are each disposed at an end of a respective channel hole opposite the substrate. Each of the second channel pads includes at least one second conductivity-type impurity.
Claims9
A semiconductor device comprising:
- a gate stack including gate electrodes stacked vertically on a substrate;
- channel holes penetrating through the gate stack to extend vertically to the substrate, wherein the channel holes include a pair of first channel holes and at least one second channel hole between the pair of first channel holes, wherein each of the channel holes includes a channel region, and wherein the gate electrodes share the pair of first channel holes and the at least one second channel hole;
- a single horizontal portion disposed below the gate stack, connecting lower portions of the pair of first channel holes and the at least one second hole, and extending horizontally;
- first channel pads, the pair of first channel holes opposite the substrate;
- at least one second channel pads disposed at an end of the at least one second channel hole opposite the substrate,
- wherein portions of the channel region extend from the channel holes to the single horizontal portion to be connected to each other;
- first interconnection lines connected to the first channel pads;
- and
- at least one second interconnection line connected to the at least one second channel pads, wherein the at least one second interconnection line receives an electrical signal different from an electrical signal applied to the first interconnection lines.
A semiconductor device, comprising:
- a gate stack including gate electrodes stacked vertically on a substrate;
- channel holes penetrating through the gate stack to extend vertically to the substrate, wherein the channel holes include a pair of first channel holes and at least one second channel hole between the pair of first channel holes, wherein each of the channel holes includes a channel region, and wherein the gate electrodes share the pair of first channel holes and the at least one second channel hole;
- a single horizontal portion disposed below the gate stack, connecting lower portions of the pair of first channel holes and the at least one second hole, and extending horizontally;
- first channel pads, the pair of first channel holes opposite the substrate;
- at least one second channel pads disposed at an end of the at least one second channel hole opposite the substrate,
- wherein portions of the channel region extend from the channel holes to the single horizontal portion to be connected to each other;
- and
- a hole connecting portion disposed on sides of two adjacent channel holes of the channel holes to connect the two adjacent channel holes to each other.
Dependencies are inferred from the claim text.