Integrated assemblies

An integrated assembly, comprising:

• vertically-stacked memory cells over a select device;
• first semiconductor channel material along the memory cells;
• second semiconductor channel material comprised by the select device;
• the second semiconductor channel material comprising a boundary region where a more-heavily-doped region interfaces with a less-heavily-doped region;
• both the more-heavily-doped region and the less-heavily-doped region having majority carriers of the same conductivity type;
• and
• a gating structure comprised by the select device, the gating structure being adjacent the second semiconductor channel material and having a gating region and an interconnecting region of a common and continuous material;
• the gating region having a length extending across a segment of the more-heavily-doped region, a segment of the less-heavily-doped region, and the boundary region;
• the interconnecting region extending laterally outwardly from the gating region on a side opposite the second semiconductor channel region, and being narrower than the length of the gating region.