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US 9,853,016 B2Granted
Systems and methods for high-speed, low-profile memory packages and pinout designs
AssigneeApple Inc.
InventorsAnthony Fai, Evan R. Boyle, Zhiping Yang, Zhonghua Wu
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Abstract
Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Claims16
A method for manufacturing a stacked semiconductor package, the method comprising:
- providing an integrated circuit (“IC”) package substrate comprising a plurality of conductive contacts formed on a surface of the IC package substrate, wherein the plurality of conductive contacts further comprise a plurality of data I/O contacts and a plurality of ground (“GND”) contacts, wherein only two GND contacts of the plurality of GND contacts are surrounded by the data I/O contacts associated with respective ones of the first and second subsets of the plurality conductive contacts;
- physically coupling an stack of memory dies to a top surface of the IC package substrate in an arrow-shaped stack;
- electrically coupling bond pads provided on exposed surfaces of the memory dies in a first half of the arrow-shaped stack to contacts of the IC package substrate associated with a first communications channel;
- and
- electrically coupling bond pads provided on exposed surfaces of the memory dies in a second half of the arrow-shaped stack to contacts of the IC package substrate associated with a second communications channel.
2 more elements
A method for manufacturing a stacked semiconductor package, the method comprising:
- providing an integrated circuit (“IC”) package substrate comprising an array of contacts, the array of contacts comprising a plurality of data I/O contacts formed on a surface of the IC package substrate, wherein:
- a first subset of the plurality of data I/O contacts forms a first C-shaped layout arranged on a first portion of the bottom surface;
- a second subset of the plurality of data I/O contacts forms a second C-shaped layout arranged on a second portion of the bottom surface;
- and
- the first portion and the second portion are reflectively symmetrical about a central axis;
- physically coupling an stack of memory dies to a top surface of the IC package substrate in an arrow-shaped stack;
- electrically coupling bond pads provided on exposed surfaces of the memory dies in a first half of the arrow-shaped stack to contacts of the IC package substrate associated with a first communications channel;
- and
- electrically coupling bond pads provided on exposed surfaces of the memory dies in a second half of the arrow-shaped stack to contacts of the IC package substrate associated with a second communications channel.
6 more elements
Dependencies are inferred from the claim text.