Semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsKentaro Mori, Chiaki Takubo
Life of this patent
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Abstract
A semiconductor device includes a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface. A first metal layer has a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface. The third surface is larger than the second surface. A resin layer has a fifth surface facing the first semiconductor chip and a sixth surface facing the first metal layer. A pad is on the first surface of the first semiconductor chip. A first via contact is within the resin layer on the third surface of the first metal layer. A second via contact is within the resin layer on the pad. The first and second via contacts are connected to first and the second interconnects, respectively.
Claims20
A semiconductor device comprising:
- a first semiconductor chip having a first surface with a semiconductor element and a second surface opposite the first surface;
- a first metal layer having a third surface supporting the first semiconductor chip and a fourth surface opposite the third surface, the third surface of the first metal layer having an outer edge larger than an outer edge of the second surface of the first semiconductor chip;
- a resin layer around the first semiconductor chip and the first metal layer, the resin layer having a fifth surface facing the first surface of the semiconductor chip and a sixth surface facing the fourth surface of the first metal layer;
- a pad on the first surface of the first semiconductor chip and electrically connected to the semiconductor element;
- a first via contact within the resin layer and on the third surface of the first metal layer;
- a second via contact within the resin layer and on the pad;
- a first interconnect on the fifth surface of the resin layer and electrically connected to the first metal layer by the first via contact;
- and
- a second interconnect on the fifth surface of the resin layer and electrically connected to the pad by the second via contact.
A semiconductor device comprising:
- a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface;
- a first metal layer having a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface, the third surface of the first metal layer having a perimeter larger than a perimeter of the second surface of the first semiconductor chip;
- a resin layer around the first semiconductor chip and the first metal layer, the resin layer having a fifth surface facing the first surface of the first semiconductor chip and a sixth surface facing the fourth surface of the first metal layer;
- a pad on the first surface of the first semiconductor chip and electrically connected to the semiconductor element;
- a first via contact within the resin layer and on the third surface of the first metal layer;
- a second via contact within the resin layer and on the pad;
- a first interconnect on the fifth surface of the resin layer and electrically connected to the first metal layer by the first via contact;
- and
- a second interconnect on the fifth surface of the resin layer and electrically connected to the pad by the second via contact.
A semiconductor device comprising:
- a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface;
- a first metal layer having a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface, the third surface of the first metal layer having a perimeter larger than a perimeter of the second surface of the first semiconductor chip;
- a resin layer encapsulating the first semiconductor chip and the first metal layer, the resin layer having a fifth surface facing the first surface and a sixth surface facing the fourth surface;
- a pad on the first surface of the first semiconductor chip and electrically connected to the semiconductor element;
- a first via contact within the resin layer and on the third surface of the first metal layer;
- a second via contact within the resin layer and on the pad;
- a first interconnect on the fifth surface of the resin layer and electrically connected to the first metal layer by the first via contact;
- and
- a second interconnect on the fifth surface of the resin layer and electrically connected to the pad by the second via contact.
Dependencies are inferred from the claim text.