Fabricating method of anti-fuse structure
AssigneeUnited Microelectronics Corp.
InventorDai Yang Lee
Life of this patent
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Abstract
A fabricating method of an anti-fuse structure, comprising: providing a substrate having a first conductive plug and a second conductive plug separated from the first conductive plug; forming an amorphous silicon layer on the substrate, wherein a portion of the amorphous silicon layer overlapping the first conductive plug is defined as a first region, and a portion of the amorphous silicon layer overlapping the second conductive plug is defined as a second region; performing an implantation process to the first region and the second region, wherein the first region has a higher doping concentration than the second region; forming a titanium nitride layer on the amorphous silicon layer; and patterning the titanium nitride layer and the amorphous silicon layer.
Claims13
A fabricating method of an anti-fuse structure, comprising:
- providing a substrate having a first conductive plug and a second conductive plug separated from the first conductive plug;
- forming an amorphous silicon layer on the substrate, wherein a portion of the amorphous silicon layer overlapping the first conductive plug is defined as a first region, and a portion of the amorphous silicon layer overlapping the second conductive plug is defined as a second region;
- performing an implantation process to the first region and the second region, wherein the first region has a higher doping concentration than the second region;
- forming a titanium nitride layer on the amorphous silicon layer;
- and
- patterning the titanium nitride layer and the amorphous silicon layer.
Dependencies are inferred from the claim text.