Corrosion resistant chip sidewall connection with crackstop and hermetic seal

#The present disclosure relates to semiconductor structures and, more particularly, to corrosion resistant chip sidewall connections with crackstop structures with a hermetic seal, and methods of manufacture.

#Semiconductor chips are formed on a wafer. After fabrication processes are completed, the wafer is diced by cutting the wafer along kerfs resulting in the singulation of the chips, e.g., separate chips. The dicing processes is a physical process which induces stress into the chips. These stresses result in stress cracks forming through the semiconductor chip structure, which can degrade or even destroy the functionality of the chip, itself. For example, cracks typically form along interfaces between metal structures and dielectric materials, with some portions of the semiconductor structures particularly susceptible to crack propagation.

#To avoid such stress cracks designers use guard ring structures to surround the active region of the chip. However, after the chip is fully fabricated, these guard ring structures can prevent the use of contacts to the outside for testing. Thus, in order to have contacts extending from the inner portion of the chip, it is necessary to go around the guard ring structure. This may result in a propagation path or moisture ingress into the chip.

#The present disclosure is described in the detailed description which follows, in reference to the noted plurality of drawings by way of non-limiting examples of exemplary embodiments of the present disclosure.

#FIG. 1 shows a structure and respective fabrication processes in accordance with aspects of the present disclosure.

#FIG. 2 shows a recessed portion of a wiring connection and respective fabrication processes in accordance with aspects of the present disclosure.

#The present disclosure relates to semiconductor structures and, more particularly, to corrosion resistant chip sidewall connections with crackstop structures with a hermetic seal, and methods of manufacture. More specifically, the present disclosure relates to corrosion resistant chip sidewall connections for 3D packaging with improved crackstop capabilities and a hermetic seal to prevent corrosion to components provided with a perimeter of the crackstop structure. In embodiments, the corrosion resistant chip sidewall connection can include a shielding structure and a corrosion resistant strip, the former feature which prevents or blocks cracks from entering into the active region of the chip and the latter feature which ensures that corrosion does not spread to wiring or other components of the chip.

#Accordingly and advantageously, the structure described herein provides many beneficial features including, for example, the ability to block cracks from entering an open pathway of a crackstop structure, as well as a hermetic seal used to insulate wire penetrations which extend through the open pathway of the metal crackstop. The structure described herein also provides a connection (e.g., wire penetrations) from a side or edge of the chip while maintaining the hermetic seal. In this way, moisture cannot penetrate to the active and passive components of the chip, while still allowing for connections for testing, etc. For example, the structure described herein provides a corrosion resistant connection or contact (wiring penetration) from a side or edge of the chip which can be used for testing or to increase I/O connections to the outside environment. In this way, the corrosion resistant connection or contact can be used to provide additional connections, in addition to those connections provided from the top of the chip.

#The structure of the present disclosure can be manufactured in a number of ways using a number of different tools. In general, though, the methodologies and tools are used to form structures with dimensions in the micrometer and nanometer scale. The methodologies, i.e., technologies, employed to manufacture the structure of the present disclosure have been adopted from integrated circuit (IC) technology. For example, the structures are built on wafers and are realized in films of material patterned by photolithographic processes on the top of a wafer. In particular, the fabrication of the structure uses three basic building blocks: (i) deposition of thin films of material on a substrate, (ii) applying a patterned mask on top of the films by photolithographic imaging, and (iii) etching the films selectively to the mask.