US 9,852,946 B1Granted

Self aligned conductive lines

AssigneeInternational Business Machines Corporation

InventorsSean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Yann A. M. Mignot, Christopher J. Penny, Roger A. Quon, Nicole Saulnier

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Abstract

A method for forming conductive lines on a wafer comprises forming a first sacrificial mandrel and a second sacrificial mandrel. Spacers are formed adjacent to the first and second sacrificial mandrels. A filler material is deposited on the second hardmask. A first mask is formed on a portion of the second sacrificial mandrel. A first cavity and a second cavity are formed that expose portions of the second hardmask, and exposed portions of the second mask and exposed portions of the filler material are removed to expose portions of the first hardmask. Exposed portions of the first hardmask, the planarizing layer and the first hardmask are removed to expose portions of the insulator layer. Exposed portions of the insulator layer are removed to form a trench in the insulator layer and the trench is filled with a conductive material.

Claims20

Dependent claims

A method for forming conductive lines on a semiconductor wafer, the method comprising:

forming a first hardmask on an insulator layer, a planarizing layer on the first hardmask, a second hardmask on the planarizing layer and a layer of sacrificial mandrel material on the second hardmask;
removing portions of the layer of sacrificial mandrel material to expose portions of the second hardmask and form a first sacrificial mandrel and a second sacrificial mandrel on the second hardmask;
forming spacers adjacent to sidewalls of the first sacrificial mandrel and sidewalls of the second sacrificial mandrel;
depositing a filler material on the second hardmask between the first sacrificial mandrel and the second sacrificial mandrel;
forming a first mask on a portion of the second sacrificial mandrel;
removing exposed portions of the first sacrificial mandrel and the second sacrificial mandrel to form a first cavity and a second cavity that expose portions of the second hardmask;
removing the first mask;
forming a second mask that fills the first cavity and the second cavity;
forming a resist mask over a portion of the filler material;
removing exposed portions of the second mask and exposed portions of the filler material to expose portions of the first hardmask;
removing the resist mask;
removing exposed portions of the first hardmask, the planarizing layer and the second hardmask to expose portions of the insulator layer;
removing the planarizing layer, the second hardmask, the filler material, the second sacrificial mandrel, and the spacers to expose the first hardmask;
removing exposed portions of the insulator layer to form a trench in the insulator layer;
and
filling the trench with a conductive material.

13 more elements

A method for forming conductive lines on a semiconductor wafer, the method comprising:

forming a first hardmask on an insulator layer, a first planarizing layer on the first hardmask, and a second hardmask on the first planarizing layer;
forming a first mask on the second hardmask;
removing exposed portions of the second hardmask to expose portions of the first planarizing layer;
forming a third hardmask on the first hardmask and the exposed portions of the first planarizing layer;
forming a layer of sacrificial mandrel material on the third hardmask;
forming a fourth hardmask on the layer of sacrificial mandrel material;
forming a second mask on the fourth hardmask;
removing exposed portions of the fourth hardmask and the layer of sacrificial mandrel material to expose portions of the third hardmask and form a first sacrificial mandrel and a second sacrificial mandrel;
forming spacers adjacent to sidewalls of the first sacrificial mandrel and sidewalls of the second sacrificial mandrel;
forming a second planarizing layer adjacent to the spacers;
removing exposed portions of the first sacrificial mandrel and the second sacrificial mandrel to form a first cavity and a second cavity;
increasing a depth of the first cavity and a depth of the second cavity by removing exposed portions of the third hardmask, the second hardmask, and the first planarizing layer to expose portions of the first hardmask;
removing exposed portions of the first hardmask to expose portions of the insulator layer;
removing exposed portions of the insulator layer to form a first trench and a second trench;
removing the first hardmask;
and
filling the first trench and the second trench with a conductive material.

14 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/176,279Filed 8 Jun 2016
Published: US 2017/0358492 A114 Dec 2017
Granted: 26 Dec 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
H10P 50/73
Etching of wafers, substrates or parts of devices: using masks for insulating materials
H10P 76/4085
Characterised by their sizes, orientations, dispositions, behaviours or shapes: characterised by the processes involved to create the masks
H10W 20/033
Of conductive barrier, adhesion or liner layers: in openings in dielectrics