Adjustable power rail multiplexing
AssigneeQUALCOMM Incorporated
InventorsLipeng Cao, Dorav Kumar, Bilal Zafar, Ramaprasath Vilangudipitchai, Venkatasubramanian Narayanan, Xi Luo
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AssigneeQUALCOMM Incorporated
InventorsLipeng Cao, Dorav Kumar, Bilal Zafar, Ramaprasath Vilangudipitchai, Venkatasubramanian Narayanan, Xi Luo
Estimating the term…
An integrated circuit (IC) is disclosed herein for adjustable power rail multiplexing. In an example aspect, an IC includes a first power rail, a second power rail, and a load power rail. The IC further includes multiple power-multiplexer (power-mux) tiles and adjustment circuitry. The multiple power-mux tiles are coupled in series in a chained arrangement and implemented to jointly perform a power-multiplexing operation. Each power-mux tile is implemented to switch between coupling the load power rail to the first power rail and coupling the load power rail to the second power rail. The adjustment circuitry is implemented to adjust at least one order in which the multiple power-mux tiles perform at least a portion of the power-multiplexing operation.
An integrated circuit comprising:
An integrated circuit comprising:
A method for adjustable power rail multiplexing in an integrated circuit, the method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.
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Field of the Disclosure
This disclosure relates generally to power management of integrated circuits (ICs) used in electronic devices and, more specifically, to switching a power source for a circuit to a lower voltage level to reduce power consumption.
Description of Related Art
FIG. 1 depicts an example integrated circuit portion that includes multiple power-multiplexer (power-mux) tiles and a circuit load.
FIG. 2 depicts an example chained arrangement of multiple power-mux tiles, which include internal switches coupled to power rails, in conjunction with power-mux circuitry and adjustment circuitry.
FIG. 3 illustrates example orders for a power-multiplexing operation that is performed by multiple power-mux tiles that are coupled in series.
Power management of electronic devices entails controlling an amount of power that an integrated circuit (IC) consumes over time or on an instantaneous basis. Power multiplexing techniques may be utilized as part of a power management strategy to provide power reduction opportunities. With power multiplexing, an integrated circuit portion is switched from being powered at one voltage level to being powered at another voltage level. Generally, an integrated circuit portion consumes less energy if operated at a lower voltage level.
Energy consumption can be reduced to zero or near zero during times of nonuse if an integrated circuit is powered down completely. At times of lower utilization or to retain some stored data, an integrated circuit may be powered down to a lower voltage level to reduce power consumption. If an integrated circuit cannot be powered down as a whole, then one or more portions, or cores, may be powered down independently of one another. For example, in the context of a graphics processing unit (GPU), if the integrated circuit chip of the GPU is waiting for additional data or user input before changing a display on a screen, a core of the GPU may be powered down completely. Alternatively, a supply voltage of the GPU core may be lowered. One way to lower the supply voltage is to use power multiplexing techniques to switch the GPU core from one power rail held at one voltage level to another power rail held at another, lower voltage level.
For power multiplexing generally then, a circuit load is multiplexed between multiple power rails with one power rail being held at a voltage level that is lower than the other power rail or rails. The multiplexing between multiple different power rails is effectuated using multiple power-multiplexer tiles (power-mux tiles). With two power rails, for example, each power-multiplexer tile (power-mux tile) includes two switches, such as two transistors, with each switch coupled to one of the two power rails. A power-multiplexing operation entails disconnecting the circuit load from one power rail and connecting the circuit load to another power rail using the two switches and an ordered switching process. If a circuit load occupies a large area of an integrated circuit chip, multiple power-mux tiles may be distributed at different physical locations over the chip to meet current-resistance (IR) drop requirements and to deliver power to different areas of the chip, as will be appreciated by the skilled artisan.
Circuit arrangements not adapted to a particular application of the relay and
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits: arrangements for reducing power consumption
Electric switches
Pulse technique
About 9 years 10 months of term left · ends 6 Sep 2036 (estimated)