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US 9,852,786 B2Granted
Semiconductor memory device that varies voltage levels depending on which of different memory regions thereof is accessed
AssigneeToshiba Memory Corporation
InventorsKazutaka Takizawa, Masaaki Niijima
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a semiconductor memory chip including a plurality of regions of memory cells, including a first memory region and a second memory region, and a memory controller configured to carry out a read of a memory cell in the first memory region by applying a first read voltage, and a read of a memory cell in the second memory region by applying a second read voltage that is different from the first read voltage.
Claims19
A semiconductor memory device, comprising:
- a semiconductor memory chip including a plurality of regions of memory cells, including a first memory region and a second memory region;
- and
- a memory controller configured to
- set a first voltage based on a first number of times the first memory region has been accessed since a predetermined point of time and carry out an operation on memory cells of the first memory region by applying the first voltage, when the first number is more than a threshold number, and
- set a second voltage that is different from the first voltage based on a period of time that has passed since a last access to the second memory region and carry out the operation on memory cells of the second memory region by applying the second voltage, when a second number of times the second memory region has been accessed since the predetermined point of time is less than the threshold number.
2 more elements
A semiconductor memory device, comprising:
- a semiconductor memory chip including a plurality of regions of memory cells, including a first memory region and a second memory region;
- and
- a memory controller configured to
- set a first voltage based on a first period of time that has passed since a last access to the first memory region and carry out an operation on memory cells of the first memory region by applying the first voltage, when a first number of times the first memory region has been accessed since the predetermined point of time is less than a threshold number, and
- set a second voltage that is different from the first voltage based on a second period of time that has passed since a last access to the second memory region and carry out the operation on memory cells of the second memory region by applying the second voltage, when a second number of times the second memory region has been accessed since the predetermined point of time is less than the threshold number.
2 more elements
A semiconductor memory device, comprising:
- a semiconductor memory chip including a plurality of regions of memory cells, including a first memory region and a second memory region;
- and
- a memory controller configured to:
- set a first voltage based on a number of error bits included in data read from the first memory region and perform an erase operation on memory cells of the first memory region by applying the first voltage, and
- set a second voltage that is different from the first voltage based on a number of error bits included in data read from the second memory region and perform the erase operation on memory cells of the second memory region by applying the second voltage.
2 more elements
Dependencies are inferred from the claim text.