Mapping graphs onto core-based neuromorphic architectures

A method for mapping a graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits, wherein said graph includes a set of nodes and a set of directed edges, comprising:

• decomposing said graph into multiple bipartite sub-graphs;
• for each sub-graph:
• for each node of said sub-graph that appears as a source node, creating a corresponding splitter construct by programming multiple neurons of the core circuits to receive input spikes from one axon interconnected to the multiple neurons, duplicate the input spikes received, and send the duplicated input spikes to multiple target axons, thereby increasing effective neuron fan-out;
• for each node of said sub-graph that appears as a target node, creating a corresponding merger construct by programming one neuron of the core circuits to receive input spikes from multiple axons and combine the input spikes received, thereby increasing effective neuron fan in;
• and
• connecting each splitter construct and each merger construct based on a permutation of an interconnect network interconnecting the core circuits;
• and
• for each node that appears in more than one sub-graph, connect each corresponding merger construct for said node to a corresponding splitter construct for said node.

A system for mapping a bipartite graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits, wherein the graph includes a set of source nodes and a set of target nodes, comprising:

• one or more splitter constructs, wherein each splitter construct corresponds to a source node of the graph, and each splitter construct is created by programming multiple neurons of the core circuits to receive input spikes from one axon interconnected to the multiple neurons, duplicate the input spikes received, and send the duplicated input spikes to multiple target axons, thereby increasing effective neuron fan-out;
• and
• one or more merger constructs, wherein each merger construct corresponds to a target node, and each merger construct is created by programming one neuron of the core circuits to receive input spikes from multiple axons and combine the input spikes received, thereby increasing effective neuron fan-in;
• wherein each splitter construct and each merger construct are connected based on a permutation of an interconnect network interconnecting the core circuits.