Method and system for implementing a requirements driven closed loop verification cockpit for analog circuits
AssigneeCadence Design Systems, Inc.
InventorsPaul C. Foster, Walter E. Hartong, Jinduo Sun
Life of this patent
Estimating the term…
Abstract
Disclosed is an approach to implement a requirements-driven analog verification flow. Disparate islands of verification tasks are performed with individual cellviews to be set into an overarching and closed loop verification flow context for a project or a complex verification task.
Claims20
A method for verifying an electronic circuit design, comprising:
- identifying or defining requirements from one or more storage devices for the electronic circuit design;
- defining one or more cellviews pertaining to one or more portions of the electronic circuit design;
- mapping the requirements to the one or more cellviews;
- identifying a change in the electronic design, in the requirements, or in a verification plan for verifying the electronic design;
- running, at a verification tool comprising one or more simulation engines and functioning in tandem with at least one microprocessor, verifications for mapped implementations of the one or more cellviews that correspond to the change at least by executing the verifications while avoiding re-executing the verifications on an unchanged portion that has not changed in the electronic design, in the requirements, or in the verification plan between a current verification and a previous verification that has been executed;
- and
- analyzing results from running the verifications.
A computer program product that includes a computer readable medium, the computer readable medium comprising a plurality of computer instructions which, when executed by a processor, cause the processor to execute a method for verifying an electronic circuit design, the process comprising:
- identifying or defining requirements from one or more storage devices for the electronic circuit design;
- defining one or more cellviews pertaining to one or more portions of the electronic circuit design;
- mapping the requirements to the one or more cellviews;
- identifying a change in the electronic design, in the requirements, or in a verification plan for verifying the electronic design;
- running, at a verification tool comprising one or more simulation engines and functioning in tandem with at least one microprocessor, verifications for mapped implementations of the one or more cellviews that correspond to the change at least by executing the verifications while avoiding re-executing the verifications on an unchanged portion that has not changed in the electronic design, in the requirements, or in the verification plan between a current verification and a previous verification that has been executed;
- and
- analyzing results from running the verifications.
A system for processing an electronic circuit design, comprising:
- a memory comprising a storage structure to store a plurality of computer instructions;
- and
- a processor, wherein the processor is configured to execute the plurality of instructions to verify an electronic design at least by
- identifying or defining requirements from one or more storage devices for the electronic circuit design,
- defining one or more cellviews pertaining to one or more portions of the electronic circuit design,
- mapping the requirements to the one or more cellviews,
- identifying a change in the electronic design, in the requirements, or in a verification plan for verifying the electronic design;
- running verifications for mapped implementations of the one or more cellviews that correspond to the change at least by executing the verifications while avoiding re-executing the verifications on an unchanged portion that has not changed in the electronic design, in the requirements, or in the verification plan between a current verification and a previous verification that has been executed, and
- analyzing results from running the verifications.
Dependencies are inferred from the claim text.