Electronic device with enhanced management data input/output control

#The present invention relates to controlling a read/write operation to be executed by a slave device on a bus, and more particularly, to an electronic device with enhanced management data input/output control.

#Management data input/output (MDIO) interface is specified in the IEEE 802.3 standard and intended to provide a serial interface to transfer management data between a media access control (MAC) layer and a physical (PHY) layer. The MDIO interface includes two pins, a bidirectional MDIO pin coupled to an MDIO bus and a management data clock (MDC) pin coupled to an MDC bus. The MDC is usually provided by a MDIO master and sourced to all MDIO slaves on an MDIO bus controlled by the MDIO master. A device with the MDIO master that controls the MDIO bus is called a station management entity (STA), while a device with the MDIO slave being managed is called an MDIO manageable device (MMD). To put it another way, the STA is embedded in the MAC layer and acts as a master for MDIO interface, and the MMD is embedded in the PHY device and acts as a slave on the MDIO interface. One MDIO master is allowed to be coupled to a plurality of MDIO slaves through an MDIO bus. The MDIO bus is a relatively slow interface. However, its ability to access and modify various registers in PHY devices (i.e., MDIO slaves) by the MDIO master can extend the application of a network device using the MDIO interface.

#If the MDIO master is required to send a write command accompanied with the same write data to each of a plurality of MDIO slaves on the MIDO bus, the MDIO master has to send the write command several times due to the fact that the MDIO slaves have different designated physical (port) addresses and a write command for a particular physical (port) address is executed by one of the MDIO slaves only. In addition, there are no error check mechanism and write-incremental function supported by the MDIO interface specified in the IEEE 802.3 standard. Hence, there is a need for an innovative design which is capable of achieving enhanced MDIO control over MDIO slaves on the MDIO bus.

#FIG. 1 is a diagram illustrating a structure of an MDIO frame defined in Clause 22 of IEEE 802.3 standard.

#FIG. 2 is a diagram illustrating a structure of an MDIO frame defined in Clause 45 of IEEE 802.3 standard.

#FIG. 3 is a diagram illustrating an electronic device according to a first embodiment of the present invention.

#Certain terms are used throughout the following description and claims, which refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not in function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

#MDIO as originally defined in Clause 22 of IEEE 802.3 standard enables an STA (e.g., an MDIO master) to access up to 32 registers in 32 different PHY devices (e.g., MDIO slaves). More specifically, up to 32 PHY devices are supported per Clause 22 STA, and up to 32 registers are supported per Clause 22 PHY device. The STA initializes an MDIO command by using an MDIO frame, and provides PHY (port) address and register address to perform register read or write operation. FIG. 1 is a diagram illustrating a structure of an MDIO frame defined in Clause 22 of IEEE 802.3 standard. The preamble field “PRE” is to initialize the transaction by using 32 bits of 1's. The start of frame field “ST” is set by 01. The opcode field field nally defined in Clause 22 of IEEE 802.3 standard enables an STA (e.g., an MDIO master) to access up toned in Clause 22 of IEEE 802.3 standard include a write command with OP=01 and a read command with OP=10. The PHY address (i.e., port address) field “PHYAD” defines a target PHY (port) address of an MDIO slave to be accessed. The register address field “REGAD” defines a target register address of a register implemented in the MDIO slave with the target PHY (port) address. The turnaround time field “TA” has 2 bits to provide some turnaround time for the MDIO bus to avoid contention during a read operation. For a read operation, TA[1:0]=Z0. For a write operation, TA[1:0]=10. Hence, concerning a read transaction, both of the MDIO master and the MDIO slave shall remain in a high impedance state Z for the first bit time of the turnaround. The MDIO slave shall drive one bit “0” during the second bit time of the turnaround. Concerning a write transaction, the MDIO master shall drive one bit “1” for the first bit time of the turnaround, and then drive another bit “0” for the second bit time of the turnaround. The data field “DATA” has a 16-bit write data driven by the MDIO master in the write operation, and has a 16-bit read data driven by the MDIO slave in the read operation.

#To address the limitations of Clause 22 of IEEE 802.3 standard, the Clause 45 is added to IEEE 802.3 standard for extending the existing frame format to give provision to access 32 PHY devices, 32 different device types, and 64K registers in each of these PHY devices. More specifically, up to 32 PHY devices are supported per Clause 45 STA, up to 32 devices are supported per Clause 45 PHY device, and up to 65536 registers are supported per Clause 45 device. FIG. 2 is a diagram illustrating a structure of an MDIO frame defined in Clause 45 of IEEE 802.3 standard. The preamble field “PRE” is to initialize the transaction by using 32 bits of l's. The start of frame field “ST” is set by 00. The opcode field “OP” is set by 00 for a set-address operation, set by 01 for a write operation, set by 10 for a read operation, and set by 10 for a read and post address increment operation. Hence, the MDIO commands defined in Clause 45 of IEEE 802.3 standard include a set-address command with OP=00, a write command with OP=01, a read command with OP=10, and a post-read-increment-address command with OP=10. The port address (i.e., PHY address) field “PRTAD” defines a target PHY (port) address of an MDIO slave to be accessed. The device address field “DEVAD” defines a target device address of a device used in the MDIO slave with the target PHY (port) address. The turnaround time field “TA” has 2 bits set by 10 for either of the set-address command and the write command, and has 2 bits set by Z0 for either of the read command and the post-read-increment-address command. The data field “DATA” has a 16-bit address data driven by the MDIO master in the set-address operation, a 16-bit write data driven by the MDIO master in the write operation, a 16-bit read data driven by the MDIO slave in the read operation, and a 16-bit read data driven by the MDIO slave in the read and post address increment operation.