Phase locked loop (PLL) timing device evaluation system and method for evaluating PLL timing devices

An evaluation board comprising:

• a circuit board;
• an input and output circuit disposed on the circuit board;
• control logic disposed on the circuit board and coupled to the input and output circuit;
• a plurality of PLL-timed physical devices, where some of the PLL-timed physical devices are the same type of physical devices in a communication system, each of the plurality of PLL-timed physical devices coupled to the input and output circuit;
• a first connector receptacle disposed on the circuit board and coupled to the control logic and to one or more of the PLL-timed physical devices, the first connector receptacle configured to receive a PLL card including a PLL timing device;
• a second connector receptacle disposed on the circuit board and coupled to the control logic and to one or more of the PLL-timed physical devices, the second connector receptacle configured to receive a PLL card including a PLL timing device;
• and
• a third connector receptacle coupled in series between the first connector receptacle and the second connector receptacle and configured to receive a backplane emulator card having electrical characteristics emulating a backplane of the communication system.

A system for evaluating PLL devices comprising:

• a circuit board;
• an input and output circuit disposed on the circuit board;
• control logic disposed on the circuit board and coupled to the input and output circuit, the control logic including circuitry identical to control logic circuitry of a communication system that is being emulated;
• a plurality of PLL-timed physical devices, where some of the PLL-timed physical devices are the same type of physical devices in the communication system, each of the plurality of PLL-timed physical devices coupled to the input and output circuit;
• a first connector receptacle disposed on the circuit board and coupled to the control logic and to one or more of the PLL-timed physical devices;
• a second connector receptacle disposed on the circuit board and coupled to the control logic and to one or more of the PLL-timed physical devices;
• a plurality of phase locked loop (PLL) cards, each of the PLL cards including a PLL timing device that can be used in the communication system and including a card connector configured to be coupled to the first connector receptacle and the second connector receptacle;
• a third connector receptacle coupled in series between the first connector receptacle and the second connector receptacle;
• a backplane emulator card including a connector configured to be coupled to the third connector receptacle, the backplane emulator card having electrical characteristics emulating a backplane of the communication system;
• and
• wherein ones of the plurality of PLL cards can be coupled to the first connector receptacle and to the second connector receptacle, and the backplane emulator card can be inserted into the third connector receptacle for evaluating different configurations of the communication system.