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US 9,852,021 B2Granted
Method and apparatus for encoding registers in a memory module
AssigneeIntel Corporation
InventorsBill Nale, John V. Lovelace, Murugasamy M. Nachimuthu, Tuan M. Quach
Life of this patent
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Abstract
Provided are a method and apparatus for method and apparatus for encoding registers in a memory module. A mode register command is sent to the memory module over a bus, initialization of the memory module before the bus to the memory module is trained for bus operations, to program one of a plurality of mode registers in the memory module, wherein the mode register command indicates one of the mode registers and includes data for the indicated mode register.
Claims18
An apparatus, comprising:
- a host memory controller to:
- send a mode register command to a memory module, over a bus, comprising one of a first memory module supporting a first data rate memory protocol and a second memory module supporting a second data rate memory protocol, during initialization of the memory module before the bus to the memory module is trained for bus operations, to program one of a plurality of mode registers in the memory module, wherein the mode register command indicates a mode register comprising one of the mode registers and includes data for the mode register, wherein the mode register command is sent on a first number of at least one clock cycle, and wherein after a training of the memory module, commands used to communicate with the memory module are sent on a second number of clock cycles, wherein the first number of at least one clock cycle is less than the second number of clock cycles, wherein when sending to the first memory module, the mode register command causes writing of the data to the mode register in a memory chip of the first memory module, and wherein when sending to the second memory module, the mode register command causes writing of the data to the mode register in a memory module controller of the second memory module.
An apparatus for a memory module, comprising:
- mode registers;
- memory chips to store data from a host memory controller;
- and
- memory module controller to:
- receive a mode register command from a host memory controller over a bus, during initialization of the memory module before the bus to the memory module is trained for bus operations, to program one of the mode registers, wherein the mode register command indicates a mode register comprising one of the mode registers and includes data for the mode register, wherein the mode register command is sent on a first number of at least one clock cycle, and wherein after a training of the memory module, commands used to communicate with the memory module over the bus are sent on a second number of clock cycles, wherein the first number of at least one clock cycle is less than the second number of clock cycles;
- write the data to the mode register in a memory chip in response to the memory module implementing a first data rate memory protocol;
- and
- write the data to the mode register in the memory module controller in response to the memory module implementing a second data rate memory protocol.
5 more elements
A method, comprising:
- sending a mode register command to a memory module, comprising one of a first memory module supporting a first data rate memory protocol and a second memory module supporting a second data rate memory protocol, over a bus, during initialization of the memory module before the bus to the memory module is trained for bus operations, to program one of a plurality of mode registers in the memory module, wherein the mode register command indicates a mode register comprising one of the mode registers and includes data for the mode register, wherein the mode register command is sent on a first number of at least one clock cycle, and wherein after a training of the memory module, commands used to communicate with the memory module over the bus are sent on a second number of clock cycles, wherein the first number of at least one clock cycle is less than the second number of clock cycles, wherein when sending to the first memory module, the mode register command causes writing of the data to the mode register in a memory chip of the first memory module, and wherein when sending to the second memory module, the mode register command causes writing of the data to the mode register in a memory module controller of the second memory module.
A method for programming a memory module, comprising:
- receiving a mode register command from a host memory controller over a bus, during initialization of the memory module before the bus to the memory module is trained for bus operations, to program one of plurality of mode registers, wherein the mode register command indicates a mode register comprising one of the mode registers and includes data for the mode register, wherein the mode register command is sent on a first number of at least one clock cycle, and wherein after a training of the memory module, commands used to communicate with the memory module over the bus are sent on a second number of clock cycles, wherein the first number of at least one clock cycle is less than the second number of clock cycles;
- write the data to the mode register in a memory chip in response to the memory module implementing a first data rate memory protocol;
- and
- write the data to the mode register in a memory module controller in response to the memory module implementing a second data rate memory protocol.
1 more element
Dependencies are inferred from the claim text.