Function virtualization facility for function query of a processor
AssigneeInternational Business Machines Corporation
InventorsDan F. Greiner, Damian Leo Osisek, Timothy J. Slegel
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AssigneeInternational Business Machines Corporation
InventorsDan F. Greiner, Damian Leo Osisek, Timothy J. Slegel
Estimating the term…
Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi-function instruction querying the availability of functions, only functions not hidden are reported as installed.
A computer implemented method for hiding selected installed functions of a multi-function instruction, the multi-function instruction being architected to be executed by a single processor to cause the single processor to perform a single function of a plurality of installed functions, the single function being identified by the multi-function instruction, the plurality of installed functions comprising a query function to discover installed functions and one or more non-query functions to operate on operands of a multi-function instruction, the method comprising:
A computer implemented method for hiding selected installed functions of a multi-function instruction, the multi-function instruction being architected to be executed by a single processor to cause the single processor to perform a single function of a plurality of installed functions, the single function being identified by the multi-function instruction, the plurality of installed functions comprising one or more non-query functions to operate on operands of a multi-function instruction, the method comprising:
Dependencies are inferred from the claim text.
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Arrangements for executing machine instructions, e.g. instruction decode: arrangements for executing specific machine instructions
Arrangements for executing machine instructions, e.g. instruction decode: instruction operation extension or modification
Instruction operation extension or modification: using decoder, e.g. decoder per instruction set, adaptable or programmable decoders
Hypervisors; Virtual machine monitors: bare-metal, i.e. hypervisor runs directly on hardware
About 6 years 5 months of term left · ends 30 Mar 2033 (estimated)
The present invention is related to computer systems and more particularly to computer system processor instruction functionality.
Trademarks: IBM® is a registered trademark of International Business Machines Corporation, Armonk, N.Y., U.S.A. S/390, z900, z990 and z10 and other product names may be registered trademarks or product names of International Business Machines Corporation or other companies.
IBM has created through the work of many highly talented engineers beginning with machines known as the IBM® System 360 in the 1960s to the present, a special architecture which, because of its essential nature to a computing system, became known as “the mainframe” whose principles of operation state the architecture of the machine by describing the instructions which may be executed upon the “mainframe” implementation of the instructions which had been invented by IBM inventors and adopted, because of their significant contribution to improving the state of the computing machine represented by “the mainframe”, as significant contributions by inclusion in IBM's Principles of Operation as stated over the years. The Eighth Edition of the IBM® z/Architecture® Principles of Operation which was published February, 2009 has become the standard published reference as SA22-7832-07 and is incorporated in IBM's z10® mainframe servers. The IBM z/Architecture® Principles of Operation, Publication SA22-7832-07 is incorporated by reference in its entirety herein.
The subject matter which is regarded as the invention is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
FIG. 1A is a diagram depicting an example Host computer system;
FIG. 1B is a diagram depicting an example emulation Host computer system;
Embodiments may be practiced by software (sometimes referred to Licensed Internal Code, Firmware, Micro-code, Milli-code, Pico-code and the like, any of which would be consistent with the teaching herein). Referring to FIG. 1A, a software program code embodiment is typically accessed by the processor also known as a CPU (Central Processing Unit) 1 of the system 50 from long-term storage media 11, such as a CD-ROM drive, tape drive or hard drive. The software program code may be embodied on any of a variety of known media for use with a data processing system, such as a diskette, hard drive, or CD-ROM. The code may be distributed on such media, or may be distributed to users from the computer memory 2 or storage of one computer system over a network 10 to other computer systems for use by users of such other systems.
Alternatively, the program code may be embodied in the memory 2, and accessed by the processor 1 using the processor bus. Such program code includes an operating system which controls the function and interaction of the various computer components and one or more application programs. Program code is normally paged from dense storage media 11 to high-speed memory 2 where it is available for processing by the processor 1. The techniques and methods for embodying software program code in memory, on physical media, and/or distributing software code via networks are well known and will not be further discussed herein. Program code, when created and stored on a tangible medium (including but not limited to electronic memory modules (RAM), flash memory, Compact Discs (CDs), DVDs, Magnetic Tape and the like is often referred to as a “computer program product”. The computer program product medium is typically readable by a processing circuit preferably in a computer system for execution by the processing circuit.
FIG. 1C illustrates a representative workstation or server hardware system in which embodiments may be practiced. The system 100 of FIG. 1C comprises a representative computer system 101, such as a personal computer, a workstation or a server, including optional peripheral devices. The workstation 101 includes one or more processors 106 and a bus employed to connect and enable communication between the processor(s) 106 and the other components of the system 101 in accordance with known techniques. The bus connects the processor 106 to memory 105 and long-term storage 107 which can include a hard drive (including any of magnetic media, CD, DVD and Flash Memory for example) or a tape drive for example. The system 101 might also include a user interface adapter, which connects the microprocessor 106 via the bus to one or more interface devices, such as a keyboard 104, mouse 103, a Printer/scanner 110 and/or other interface devices, which can be any user interface device, such as a touch sensitive screen, digitized entry pad, etc. The bus also connects a display device 102, such as an LCD screen or monitor, to the microprocessor 106 via a display adapter.