Arithmetic processing method and arithmetic processor having improved fixed-point error

An arithmetic processing method using a binary fixed-point arithmetic processing circuit to carry out an operation of multiplicatively dividing a dividend by a divisor, comprising:

• shifting, by a shift circuit of the arithmetic processing circuit, the divisor by a specific number of bits when the absolute value of the divisor is within a specific range, and holding the divisor without shifting the divisor when the absolute value of the divisor is out of the specific range;
• acquiring, by an acquisition circuit of the arithmetic processing circuit, an initial value of approximation calculation for the divisor that is shifted or held without being shifted;
• calculating, by an approximation circuit of the arithmetic processing circuit, a reciprocal of the divisor by performing asymptotic approximation of the acquired initial value more than once;
• calculating, by a multiplication shift circuit of the arithmetic processing circuit, a product of the calculated reciprocal and the dividend, and shifting the calculated product by the specific number of bits when the divisor is shifted;
• calculating, by a calculation circuit of the arithmetic processing circuit, the specific range based on the number of significant bits of the reciprocal of the divisor corresponding to the number of significant bits of the divisor;
• and
• calculating, by the calculation circuit of the arithmetic processing circuit, the specific number of bits based on the number of significant bits of the reciprocal of the divisor corresponding to the number of significant bits of the divisor.