Back end of line process integrated optical device fabrication
AssigneeElenion Technologies, LLC
InventorsRuizhi Shi, Michael J. Hochberg, Ari Jason Novack, Thomas Wetteland Baehr-Jones
Life of this patent
Estimating the term…
Abstract
An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.
Claims18
A method of integrated optical device fabrication forming an optical device within a vertical span of a metal stack of an integrated semiconductor chip as part of a back end of line fabrication process, comprising:
- providing a substrate with at least one semiconductor device thereon;
- depositing a first layer comprising a dielectric over the semiconductor devices;
- depositing a second layer comprising a first stop layer on the first layer;
- depositing a third layer comprising a dielectric over the first stop layer;
- etching a first portion of the third layer down to the first stop layer;
- depositing metal in the first portion of the third layer for connection with external contacts;
- connecting the metal to one of the at least one semiconductor device or other metal layer;
- depositing a fourth layer comprising a second stop layer on the third layer;
- and
- forming a second portion of the third layer into a first waveguide for coupling light to or from the at least one semiconductor device.
A method of integrated optical device fabrication forming an optical device within a vertical span of a metal stack of an integrated semiconductor chip as part of a back end of line fabrication process, comprising:
- providing a substrate with at least one semiconductor device thereon;
- depositing a first layer comprising a dielectric over the semiconductor devices;
- depositing a second layer comprising a first stop layer on the first dielectric layer;
- depositing a third layer comprising a dielectric over the first stop layer;
- etching a first portion of the third layer down to the first stop layer;
- depositing metal in the first portion of the third layer for connection with external contacts;
- connecting the metal to one of the at least one semiconductor device or another metal layer;
- depositing a fourth layer comprising a second stop layer on the third layer;
- and
- forming a portion of one of the first stop layer and the second stop layer into a first waveguide for coupling light into or out of the at least one semiconductor device.
Dependencies are inferred from the claim text.