System on a chip serial communication interface method and apparatus
AssigneeMarvell International Ltd.
InventorsRoger Longstreet, Vivek Raghunath Khanzode, Hongying Sheng
Life of this patent
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Abstract
A system, apparatus, and method for testing blocks of a system on a chip (SOC) are described herein. An SOC, in accordance with various embodiments, may include a serial communication interface configured to multiplex, serialize, and/or parallelize signals streams from selected blocks of the SOC to an off-chip test unit through an off-chip serial communication interface. Other embodiments may be described and claimed.
Claims19
A system-on-a-chip (SOC) comprising:
- a processor block;
- a read channel block;
- a hard disk controller block;
- and
- a first interface configured to communicate with a test unit via a second interface, wherein each of the test unit and the second interface is external to the SOC,
- wherein based on a selection signal, the SOC is configured to operate, at a given time, in one of (i) a first mode that represents a normal operational mode of the SOC, (ii) a second mode that represents a processor mode for testing the SOC, (iii) a third mode that represents a hard disk controller mode for testing the SOC, or (iv) a fourth mode that represents a read channel only mode for testing the SOC,
- wherein while the SOC operates in the first mode, (i) each of the processor block, the read channel block and the hard disk controller block are functional, and (ii) the SOC does not communicate with the test unit,
- wherein while the SOC operates in the second mode, the processor block is configured to transmit data to the test unit via the first interface and the second interface,
- wherein while the SOC operates in the third mode, (i) the read channel block is non-functional, and (ii) one or both of the processor block and the hard disk controller block is configured to transmit data to the test unit via the first interface and the second interface, and
- wherein while the SOC operates in the fourth mode, (i) the read channel block is functional, (ii) the processor block and the hard disk controller block are non-functional, and (iii) the read channel block is configured to transmit data to the test unit via the first interface and the second interface.
A method of operating a system-on-a-chip (SOC) comprising (i) a processor block, (ii) a read channel block, (iii) a hard disk controller block, and (iv) a first interface, the method comprising:
- communicating, by the first interface, with a test unit via a second interface, wherein each of the test unit and the second interface is external to the SOC;
- receiving, by the SOC, a selection signal;
- based on the selection signal, receiving, by a parallel-to-serial block included in the first interface, parallel data from one of the processor, the hard disk controller block, or the read channel block;
- converting, by the parallel-to-serial block, the parallel data to serial data;
- and
- transmitting, by the parallel-to-serial block, the serial data to the test unit via the second interface;
- and
- based on the selection signal, operating, by the SOC, at a given time, in one of (i) a first mode, (ii) a second mode, (iii) a third mode, or (iv) a fourth mode,
- wherein while the SOC operates in the first mode, (i) each of the processor block, the read channel block and the hard disk controller block are functional, and (ii) the SOC does not communicate with the test unit,
- wherein while the SOC operates in the second mode, the processor block is configured to transmit data to the test unit via the first interface and the second interface,
- wherein while the SOC operates in the third mode, (i) the read channel block is non-functional, and (ii) one or both of the processor block and the hard disk controller block is configured to transmit data to the test unit via the first interface and the second interface, and
- wherein while the SOC operates in the fourth mode, (i) the read channel block is functional, (ii) the processor block and the hard disk controller block are non-functional, and (iii) the read channel block is configured to transmit data to the test unit via the first interface and the second interface.
A method of operating a system-on-a-chip (SOC) comprising (i) a processor block, (ii) a read channel block, (iii) a hard disk controller block, and (iv) a first interface, the method comprising:
- communicating, by the first interface, with a test unit via a second interface, wherein each of the test unit and the second interface is external to the SOC;
- receiving, by the SOC, a selection signal;
- receiving, by a serial-to-parallel block included in the first interface, serial data from the test unit via the second interface;
- converting, by the serial-to-parallel block, the serial data to parallel data;
- and
- based on the selection signal, transmitting, by the serial-to-parallel block, the parallel data to one of the processor, the hard disk controller block, or the read channel block;
- and
- based on the selection signal, operating, by the SOC, at a given time, in one of (i) a first mode, (ii) a second mode, (iii) a third mode, or (iv) a fourth mode,
- wherein while the SOC operates in the first mode, (i) each of the processor block, the read channel block and the hard disk controller block are functional, and (ii) the SOC does not communicate with the test unit,
- wherein while the SOC operates in the second mode, the processor block is configured to transmit data to the test unit via the first interface and the second interface,
- wherein while the SOC operates in the third mode, (i) the read channel block is non-functional, and (ii) one or both of the processor block and the hard disk controller block is configured to transmit data to the test unit via the first interface and the second interface, and
- wherein while the SOC operates in the fourth mode, (i) the read channel block is functional, (ii) the processor block and the hard disk controller block are non-functional, and (iii) the read channel block is configured to transmit data to the test unit via the first interface and the second interface.
Dependencies are inferred from the claim text.