Balanced differential transimpedance amplifier with single ended input and balancing method
AssigneeCosemi Technologies, Inc.
InventorsRobert Monroe Smith, Charles Phillip McClay
Life of this patent
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Abstract
A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.
Claims21
A balanced differential transimpedance amplifier with single ended input comprising:
- a) a differential transimpedance stage, the differential transimpedance stage further comprising a first input and a second input;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit for generating a threshold voltage for balancing the differential transimpedance stage, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage, wherein the threshold circuit receives at least one input signal and performs an averaging operation on the at least one input signal to generate the output of the threshold circuit.
A balanced differential transimpedance amplifier with single-ended input comprising:
- a) a differential transimpedance stage, the differential transimpedance stage further comprising a first input and a second input;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit for generating a threshold voltage for balancing the differential transimpedance stage, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage, wherein the input current buffer stage is one of a common base stage and common gate stage.
A balanced differential transimpedance amplifier with single-ended input comprising:
- a) a differential transimpedance stage, the differential transimpedance stage further comprising a first input and a second input;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit for generating a threshold voltage for balancing the differential transimpedance stage, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage, wherein the input current buffer stage is arranged so as to decouple a resistance associated with the differential transimpedance stage and a capacitance associated with an input current source.
A balanced differential transimpedance amplifier with single-ended input comprising:
- a) a differential transimpedance stage, the differential transimpedance stage further comprising a first input and a second input;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit for generating a threshold voltage for balancing the differential transimpedance stage, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage, wherein the threshold circuit further comprises an averaging circuit and a replica current buffer, the averaging circuit is coupled in series with the replica current buffer, and the replica current buffer is coupled in series with the second input of the transimpedance stage.
A balanced differential transimpedance amplifier with single ended input comprising:
- a) a transimpedance stage comprising a differential pair, the differential pair further comprising a first input, a second input, a first output and a second output;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit further comprising a voltage averaging circuit, wherein an output of the voltage averaging circuit is coupled to the second input of the transimpedance stage and the first and second outputs of the transimpedance stage are coupled to respective first and second inputs of the voltage averaging circuit.
A balanced differential transimpedance amplifier with singled ended input comprising:
- a) a transimpedance stage comprising a differential pair, the differential pair further comprising a first input and a second input;
- b) an input current buffer comprising a first input and a second input, wherein an input current source is coupled to the first input of the input current buffer and an output of the input current buffer is coupled to the first input of the transimpedance stage;
- c) a current averaging circuit coupled in series between the input current source and the second input of the input current buffer, wherein the current averaging circuit receives the input current source and generates a DC time averaged signal based upon the input current source;
- and
- d) a threshold circuit, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage.
A balanced differential transimpedance amplifier with single-ended input comprising:
- a) a differential transimpedance stage, the differential transimpedance stage further comprising a first input and a second input;
- b) an input current buffer stage, wherein an output of the input current buffer stage is coupled to the first input of the transimpedance stage;
- and
- c) a threshold circuit for generating a threshold voltage for balancing the differential transimpedance stage, wherein an output of the threshold circuit is coupled to the second input of the transimpedance stage, wherein the input current buffer comprises a current source coupled in series with a transistor and resistor between upper and lower voltage rails.
Dependencies are inferred from the claim text.