Memory system and controller
AssigneeToshiba Memory Corporation
InventorsYoshihisa Kojima, Katsuhiko Ueki
Life of this patent
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Abstract
In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.
Claims17
A memory system comprising:
- a nonvolatile memory to store write data sent from a host, the nonvolatile memory including a plurality of memory cells;
- a controller configured to control writing of the write data into the nonvolatile memory;
- a volatile memory configured to temporarily store the write data sent from the host;
- and
- a power supply circuit including a backup battery, the backup battery being configured to store power supplied from an external power supply, the power supply circuit being configured to supply to the nonvolatile memory, the controller, and the volatile memory, at least one of the power supplied from the external power supply and the power stored in the backup battery,
- in a case of first operation in which the power is supplied from the external power supply, the controller being configured to execute at least one cache operation and at least one host write operation:
- in the cache operation, upon completion of receiving write data that corresponds to a write command from the host, the controller returning a write completion response to the host asynchronously with completion of writing the write data that corresponds to the write command into the nonvolatile memory;
- and
- in the host write operation, the controller writing into a first block in the nonvolatile memory, the write data that has been received in the volatile memory sent from the host, such that each of the memory cells in the first block records at least two bits,
- in a case of second operation in which the power is not supplied from the external power supply:
- the power supply circuit conducting changeover to operation that uses the backup battery, and, as a result of the changeover, the nonvolatile memory, the controller, and the volatile memory starting use of the power stored in the backup battery;
- and
- the controller being configured to stop accepting a write command from the host and to determine for the write command whether a write completion response has been returned to the host, wherein:
- if the write completion response has been returned to the host, the controller is configured to write into a second block in the nonvolatile memory, first dirty data that corresponds to the write command of which the write completion response has been returned, the first dirty data being data that is included in the write data in the volatile memory and has not yet been written into the first block, such that each of the memory cells in the second block records only one bit, and
- if the write completion response has not been returned to the host, the controller is configured to abort the write command.
A memory system comprising:
- a nonvolatile memory, the nonvolatile memory including a plurality of memory cells;
- a volatile memory;
- a controller;
- and
- a power control circuit including a battery, the battery being configured to store power supplied from an external supply, the power control circuit being configured to supply to the nonvolatile memory, the volatile memory, and the controller, at least one of the power supplied from the external supply and the power stored in the battery,
- in a case where the power is supplied from the external supply, the controller being configured to:
- write data received in the volatile memory corresponding to a write command from a host into the nonvolatile memory, such that at least one of the memory cells in the nonvolatile memory stores at least two bits, and
- return a write completion response to the host asynchronously with completion of writing of the write data corresponding to the write command into the nonvolatile memory, and
- in a case where the power becomes unsupplied from the external supply, the controller being configured to, using the power stored in the battery,
- stop accepting a write command from a host, and
- determine, for the write command, whether a write completion response has been returned to the host, wherein:
- if the write completion response has been returned to the host, the controller is configured to start writing data into the nonvolatile memory, such that each of the memory cells in the nonvolatile memory stores only one bit, and
- if the write completion response has not been returned to the host, the controller is configured to abort the write command.
Dependencies are inferred from the claim text.