Semiconductor integrated circuit, variable gain amplifier, and sensing system
AssigneeRenesas Electronics Corporation
InventorMasahide Kiritani
Life of this patent
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Abstract
Provided is a semiconductor integrated circuit including a pad Pd1 provided on one end side of a resistive element R1 externally provided, a pad Pd5 provided on a different end side of the resistive element R1; an operation amplifier A1, a signal line L11 wired between an output terminal of the operation amplifier A1 and the pad Pd1, a signal line L21 wired between an inverting input terminal of the operation amplifier A1 and the pad Pd5, a ESD protection element r11 provided to the signal line L11, and a signal line L31, through which a voltage signal of the pad Pd1 is transmitted. The signal line L31 is connected to the pad Pd1.
Claims21
A semiconductor integrated circuit comprising:
- a first pad provided on one end side of a first resistive element externally provided;
- a second pad provided on a different end side of the first resistive element;
- an operation amplifier;
- a first signal line wired between an output terminal of the operation amplifier and the first pad;
- a second signal line wired between one input terminal of the operation amplifier and the second pad;
- a first ESD (Electrostatic Discharge) protection element provided to the first signal line;
- and
- a third signal line, through which a voltage signal of the first pad is transmitted, the third signal line being connected to the first pad,
- a plurality of first pads provided on one end side of each of a plurality of first resistive elements externally provided;
- the second pad provided on a different end side of each of the plurality of first resistive elements;
- a plurality of first signal lines wired between the output terminal of the operation amplifier and the plurality of first pads, respectively;
- a plurality of first switches, one of which is selectively turned on, the plurality of first switches being provided on the plurality of first signal lines, respectively;
- a plurality of first ESD protection elements provided to the plurality of first signal lines, respectively;
- a plurality of third signal lines, through which voltage signals of the plurality of first pads are transmitted, the plurality of third signal lines being connected to the plurality of first pads, respectively;
- and
- a plurality of second switches, one of which is selectively turned on, the plurality of second switches being provided on the plurality of third signal lines, respectively.
A semiconductor integrated circuit comprising:
- a first pad provided on one end side of a first resistive element externally provided;
- a second pad provided on a different end side of the first resistive element;
- an operation amplifier;
- a first signal line wired between an output terminal of the operation amplifier and the first pad;
- a second signal line wired between one input terminal of the operation amplifier and the second pad;
- a first ESD (Electrostatic Discharge) protection element provided to the first signal line;
- and
- a third signal line, through which a voltage signal of the first pad is transmitted, the third signal line being connected to the first pad,
- the first pad provided on one end side of each of a plurality of first resistive elements externally provided;
- a plurality of second pads provided on a different end side of each of the plurality of first resistive elements;
- a plurality of second signal lines wired between the one input terminal of the operation amplifier and the plurality of second pads, respectively;
- and
- a plurality of third switches, one of which is selectively turned on, the plurality of third switches being provided on the plurality of second signal lines, respectively.
A semiconductor integrated circuit comprising:
- a first pad provided on one end side of a first resistive element externally provided;
- a second pad provided on a different end side of the first resistive element;
- an operation amplifier;
- a first signal line wired between an output terminal of the operation amplifier and the first pad;
- a second signal line wired between one input terminal of the operation amplifier and the second pad;
- a first ESD (Electrostatic Discharge) protection element provided to the first signal line;
- and
- a third signal line, through which a voltage signal of the first pad is transmitted, the third signal line being connected to the first pad,
- a plurality of pads as the first and second pads;
- a plurality of first signal lines wired between the output terminal of the operation amplifier and the plurality of pads, respectively;
- a plurality of first switches provided on the plurality of first signal lines, respectively;
- a plurality of second signal lines wired between the one input terminal of the operation amplifier and the plurality of pads, respectively;
- a plurality of third switches provided on the plurality of second signal lines, respectively;
- a plurality of fourth signal lines wired between a different input terminal of the operation amplifier and the plurality of pads, respectively;
- a plurality of fourth switches provided on the plurality of fourth signal lines, respectively;
- a plurality of third signal lines, to which voltage signals of the plurality of pads are transmitted, the plurality of third signal lines being connected to the plurality of pads, respectively;
- and
- a plurality of second switches provided on the plurality of third signal lines, respectively.
A semiconductor integrated circuit comprising:
- n pads;
- a plurality of ESD (Electrostatic Discharge) protection elements provided on the n pads, respectively;
- an operation amplifier;
- and
- a subsequent stage circuit, wherein
- out of the n pads, between a first pad and a second pad, an external resistor is connected, the first pad is connected to an input of the operation amplifier, and the second pad is connected to an output of the operation amplifier, thereby making formation of a feedback path of the operation amplifier possible, and
- the subsequent stage circuit is connected to the second pad through a path different from the feedback path and is driven with a voltage generated in the second pad,
- wherein at least two pads out of the n pads are connected to the output of the operation amplifier through a switch, and by changing the switch, the second pad is determined.
Dependencies are inferred from the claim text.