Device and method for repairing memory cell and memory system including the device
AssigneeSamsung Electronics Co., Ltd.
InventorsKyo-Min Sohn, Ho-Young Song, Sang-Joon Hwang, Cheol Kim, Dong-Hyun Sohn
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AssigneeSamsung Electronics Co., Ltd.
InventorsKyo-Min Sohn, Ho-Young Song, Sang-Joon Hwang, Cheol Kim, Dong-Hyun Sohn
Estimating the term…
Provided are a method and an apparatus for repairing a memory cell in a memory test system. A test device detects a fail address by testing a memory device according to a test command, and temporarily stores the fail address in a fail address memory (FAM). The fail address is transmitted to the memory device according to a fail address transmission mode, is temporarily stored in a temporary fail address storage of the memory device, and is then stored in an anti-fuse array, which is a non-volatile storage device. To secure the reliability of data, stored data can be read to verify the data and a verification result can be transmitted in series or in parallel to the test device.
A method of operating a dynamic random access memory (DRAM) device, the DRAM device having a memory cell array, a non-volatile memory (NVM) storage array, and a fail address memory (FAM), the method comprising:
A method of operating a dynamic random access memory (DRAM) device, the DRAM device having a memory cell array, a non-volatile memory (NVM) storage array, and a fail address memory (FAM), the method comprising:
A memory system, comprising:
Dependencies are inferred from the claim text.