Read assist circuitry
AssigneeArm Limited
InventorsVivek Nautiyal, Fakhruddin Ali Bohra, Satinderjit Singh, Shri Sagar Dwivedi, Abhishek B. Akkur
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Abstract
Various implementations described herein are directed to an integrated circuit. The integrated circuit may include precharge circuitry for precharging bitlines to a source voltage level. The integrated circuit may include write assist circuitry having a charge storage element for providing a write assist signal to at least one of the bitlines. The integrated circuit may include read assist circuitry having a switching element for providing charge sharing between the bitlines, the precharge circuitry, and the charge storage element of the write assist circuitry.
Claims20
An integrated circuit, comprising:
- precharge circuitry for precharging bitlines to a source voltage level;
- write assist circuitry having a charge storage element for providing a write assist signal to at least one of the bitlines;
- and
- read assist circuitry having a switching element for providing charge sharing between the bitlines, the precharge circuitry, and the charge storage element of the write assist circuitry.
An integrated circuit, comprising:
- precharge circuitry for precharging bitlines to a source voltage level;
- read and write circuitry having a sense amplifier and a pair of write drivers coupled to the bitlines and the precharge circuitry, the sense amplifier sensing a read data signal on each of the bitlines during a read cycle, the pair of write drivers providing a write data signal to each of the bitlines during a write cycle;
- write assist circuitry having a charge storage element coupled between the pair of write drivers, the charge storage element providing a write assist signal to at least one of the bitlines during the write cycle;
- and
- read assist circuitry having a switching element coupled between the precharge circuitry and the charge storage element, the switching element providing for charge sharing between the bitlines, the precharge circuitry, and the charge storage element of the write assist circuitry during the read cycle.
A method of fabricating an integrated circuit, the method comprising:
- providing precharge circuitry for precharging bitlines to a source voltage level;
- providing read and write circuitry having a sense amplifier and a pair of write drivers coupled to the bitlines and the precharge circuitry, the sense amplifier sensing a read data signal on each of the bitlines during a read cycle, and the pair of write drivers providing a write data signal to each of the bitlines during a write cycle,
- providing write assist circuitry having a charge storage element coupled between the pair of write drivers, the charge storage element providing a write assist signal to at least one of the bitlines during the write cycle;
- and
- providing read assist circuitry having a switching element coupled between the precharge circuitry and the charge storage element, the switching element providing charge sharing between the bitlines, the precharge circuitry, and the charge storage element of the write assist circuitry during the read cycle.
Dependencies are inferred from the claim text.