Interconnect structure and method of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJiun-Yi Wu, Chien-Hsun Lee, Chewn-Pu Jou, Fu-Lung Hsueh
Life of this patent
Estimating the term…
Abstract
A method for manufacturing an interconnect structure and an interconnect structure are provided. The method includes: forming an opening in a substrate; forming a low-k dielectric block in the opening; forming at least one via in the low-k dielectric block; and forming a conductor in the via. The interconnect structure includes a substrate, a dielectric block, and a conductor. The substrate has an opening therein. The dielectric block is present in the opening of the substrate. The dielectric block has at least one via therein. The dielectric block has a dielectric constant smaller than that of the substrate. The conductor is present in the via of the dielectric block.
Claims19
An interconnect structure, comprising:
- a substrate having an opening therein;
- a dielectric block present in the opening of the substrate, the dielectric block having at least one first via therein, wherein the dielectric block has a dielectric constant smaller than that of the substrate;
- a first conductor present in the first via of the dielectric block, the first conductor having a first portion protruding out of the first via, wherein a top surface of the first portion of the first conductor is in contact with a bottom surface of the dielectric block;
- a pad present on the first conductor;
- a dielectric layer present on the substrate and having at least one second via therein to expose the pad;
- and
- a second conductor present in the second via and electrically connected to the first conductor through the pad.
An interconnect structure, comprising:
- a substrate having an opening therein;
- a low-k dielectric block present in the opening of the substrate, the low-k dielectric block having at least one first via therein;
- a first conductor present in the first via of the dielectric block, wherein a top surface of a first portion of the first conductor is in contact with a bottom surface of the dielectric block;
- a pad over the first conductor;
- a dielectric layer present on the substrate and having at least one second via therein;
- and
- a second conductor present in the second via, the second conductor being over and in contact with the pad.
An interconnect structure, comprising:
- a substrate having an opening therein;
- a dielectric block present in the opening of the substrate, the dielectric block having a plurality of vias therein, wherein the dielectric block has a dielectric constant smaller than that of the substrate;
- a plurality of conductors respectively present in the vias of the dielectric block and separated from each other by the dielectric block, wherein at least one of the conductors has a portion protruding out of at least one of the vias, and a top surface of the portion of the at least one of the conductors is in contact with a bottom surface of the dielectric block;
- a pad present on the at least one of the conductors;
- a dielectric layer present on the substrate and having at least one second via therein to expose the pad;
- and
- a second conductor present in the second via and electrically connected to the at least one of the conductors through the pad.
Dependencies are inferred from the claim text.