Analog to digital conversion with enhanced precision

A device for analog-digital conversion of an analog signal into a digital signal, the device comprising,

• a clock generator configured to generate a clock signal;
• a ramp generator, configured to deliver a voltage ramp of increasing value;
• a comparator with a first input coupled to a node carrying the analog signal and a second input coupled to an output of the ramp generator, the comparator configured to generate a comparison signal of a first logical value when a value of the voltage ramp is the same as a value of the analog signal;
• a signal generator coupled to an output the comparator and configured to generate a counter signal that is equal to the inverse of the clock signal if the comparison signal transitions to the first logical value while the clock signal is in a high state, and to generate a counter signal equal to the clock signal if the comparison signal transitions to the first logical value when the clock signal is in a low state;
• and
• a counter coupled to the signal generator to receive the counter signal, the counter configured to count a number of edges of the counter signal.

A device for analog-digital conversion of an analog signal into a digital signal, the device comprising:

• means for generating a clock signal;
• means for generating a rising voltage ramp;
• means for comparing a value of the analog signal with a value of the voltage ramp;
• means for generating a counter signal when the value of the analog signal and the value of the voltage ramp are equal, the counter signal being equal to the inverse of the clock signal if the clock signal is in a high state, or equal to the clock signal if the clock signal is in a low state;
• and
• means for counting a number of edges of the counter signal to obtain a value of the digital signal.

A system comprising:

• an image sensor comprising a matrix of rows and columns of pixels;
• a charge transfer circuit, each column of pixels being connected to the charge transfer circuit;
• and
• an analog-to-digital converter coupled to the charge transfer circuit so that a signal from each pixel of the column of pixels can be transferred from the charge transfer circuit to the analog-to-digital converter, wherein the analog-to-digital converter comprises:
• a clock generator configured to generate a clock signal;
• a ramp generator, configured to deliver a voltage ramp of increasing value;
• a comparator with a first input coupled to an output of the charge transfer circuit and a second input coupled to the output of the ramp generator, the comparator configured to generate a comparison signal of a first logical value when a value of the voltage ramp is the same as a value of a signal from the output of the charge transfer circuit;
• a signal generator coupled to an output the comparator and configured to generate a counter signal that is equal to the inverse of the clock signal if the comparison signal transitions to the first logical value while the clock signal is in a high state, and to generate a counter signal equal to the clock signal if the comparison signal transitions to the first logical value when the clock signal is in a low state;
• and
• a counter coupled to the signal generator to receive the counter signal, the counter configured to count a number of edges of the counter signal.