US 9,807,006 B1Granted

Crossbar and an egress packet modifier in an exact-match flow switch

AssigneeNetronome Systems, Inc.

InventorsGavin J. Stark, Stuart C. Wray

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Abstract

An integrated circuit includes an exact-match flow table structure, a crossbar switch, and an egress packet modifier. Each flow entry includes an egress action value, an egress flow number, and an egress port number. A Flow Id is generated from an incoming packet. The Flow Id is used to obtain a matching flow entry. A portion of the packet is communicated across the crossbar switch to the egress packet modifier, along with the egress action value and flow number. The egress action value is used to obtain non-flow specific header information stored in a first egress memory. The egress flow number is used to obtain flow specific header information stored in a second egress memory. The egress packet modifier adds the header information onto the portion of the packet, thereby generating a complete packet. The complete packet is then output from an egress port indicated by the egress port number.

Claims20

Dependent claims

A method comprising:

(a) maintaining an exact-match flow table on an integrated circuit, wherein the exact-match flow table comprises a plurality of flow entries, wherein each flow entry comprises a Flow Identification value (Flow Id) and an egress action value;
(b) receiving an incoming packet onto the integrated circuit and generating therefrom a Flow Id, wherein the incoming packet has a plurality of header fields, wherein the Flow Id is a concatenation of at least one bit from each of the header fields of the incoming packet, and wherein the Flow Id does not include all the bits of at least one of the header fields of the incoming packet;
(c) determining that the Flow Id generated in (b) is an exact-match for the Flow Id of one flow entry in the exact-match flow table, wherein the determining of (c) occurs on the first part of the integrated circuit;
(d) storing header information in a first egress packet modifier memory;
(e) communicating the egress action value and a portion of the incoming packet across a crossbar switch;
(f) receiving the egress action value onto an egress packet modifier;
(g) using the egress action value on the egress packet modifier to retrieve the header information from the first egress packet modifier memory and adding the header information to the portion of the incoming packet thereby generating an output packet;
and
(h) outputting the output packet from the integrated circuit, wherein the first egress packet modifier memory, the crossbar switch, and the egress packet modifier are parts of the integrated circuit.

6 more elements

An integrated circuit comprising:

an input port, wherein a packet is received onto the integrated circuit via the input port;
an exact-match flow table structure that maintains an exact-match flow table, wherein the exact-match flow table comprises a plurality of flow entries, wherein each flow entry comprises a Flow Identification value (Flow Id) and an egress action value, and wherein the exact-match flow table structure receives a Flow Id, determines that the Flow Id is an exact-match for a Flow Id of a particular flow entry stored in the exact-match flow table, and outputs an egress action value of the flow entry;
a crossbar switch;
an egress packet modifier, wherein a portion of the packet is communicated across the crossbar switch and to the egress packet modifier along with the egress action value, wherein the egress packet modifier uses the egress action value and the portion of the packet to generate an output packet;
and
an egress port, wherein the output packet is output from the integrated circuit via the egress port.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/726,433Filed 29 May 2015
Granted: 31 Oct 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H04L 69/22
Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass:…
H04L 5/0044
Arrangements for allocating sub-channels of the transmission path: allocation of payload; Allocation of data channels, e.g. PDSCH or PUSCH
H04L 45/38
Routing or path finding of packets in data switching networks: flow based routing
H04L 45/54
Routing or path finding of packets in data switching networks: organization of routing tables