Dynamic adjustment of a response characteristic of a phase-locked loop digital filter
AssigneeQUALCOMM Incorporated
InventorsMagnus Olov Wiklund, Emanuele Lopelli, Charles Wang, Mahbod Mofidi
Life of this patent
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AssigneeQUALCOMM Incorporated
InventorsMagnus Olov Wiklund, Emanuele Lopelli, Charles Wang, Mahbod Mofidi
Estimating the term…
An example phase-locked loop (PLL) includes a digital filter, an oscillator, and a time-to-digital converter (TDC). The digital filter is configured to sample at a discrete time that is responsive to a reference clock signal received at the digital filter. The oscillator is coupled to the digital filter and configured to generate an output signal of the PLL. The TDC is coupled to the oscillator to determine a phase difference between the output signal and the reference clock signal. The TDC also provides a time signal to the digital filter that is based on the phase difference and is representative of an instantaneous rate of operation of the PLL. The digital filter is further configured to adjust a response characteristic of the digital filter according to the time signal.
A phase-locked loop (PLL), comprising:
A method for use with a phase-locked loop (PLL) that comprises a digital filter, an oscillator, and a time-to-digital converter (TDC), the method comprising:
A phase-locked loop (PLL), comprising:
A non-transitory computer-readable medium including program code stored thereon for use with a phase-locked loop (PLL) that comprises a digital filter, an oscillator, and a time-to-digital converter (TDC), the program code comprising instructions to direct the PLL to:
Dependencies are inferred from the claim text.