Low drop out compensation technique for reduced dynamic errors in digital-to-time converters
AssigneeIntel IP Corporation
InventorsSebastian Sievert, Ofir Degani, Eshel Gordon
Life of this patent
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Abstract
An apparatus comprises a radio frequency (RF) transceiver circuit; a phase modulator that comprises digital-to-time converter (DTC) circuitry configured to convert a digital value to a specified signal phase of a signal transmitted by the RF transceiver circuit; low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein a bias current of the LDO circuitry is adjustable; and logic circuitry operatively coupled to the LDO circuitry and DTC circuitry, wherein the logic circuitry is configured to set the adjustable bias current of the LDO circuitry according to a digital value input to the DTC circuitry.
Claims24
An apparatus comprising:
- radio frequency (RF) transceiver circuitry configured to transmit and receive data with a network and a mobile communication device;
- a phase modulator comprising digital-to-time converter (DTC) circuitry configured to convert a digital value to a specified value of signal phase of the data transmitted by the RF transceiver circuit;
- low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein a bias current of the LDO circuitry is adjustable;
- and
- logic circuitry operatively coupled to the LDO circuitry and DTC circuitry, wherein the log circuitry is configured to set the bias current of the LDO circuitry according to a digital value input to the DTC circuitry.
An apparatus of user equipment (UE), the apparatus comprising:
- physical layer (PHY) circuitry, wherein the PHY circuitry comprises radio frequency (RF) transceiver circuitry configured to transmit and receive data from a network or a mobile communication device;
- a phase modulator operatively coupled to the RF transceiver circuitry, wherein the phase modulator comprises digital-to-time converter (DTC) circuitry configured to convert a digital value to a specified signal phase of a signal transmitted by the RF transmitter circuitry;
- low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein a steady-state operation of the LDO circuitry is adjustable;
- and
- logic circuitry operatively coupled to the LDO circuitry and DTC circuitry, wherein the logic circuitry is configured to adjust the bandwidth of the LDO circuitry according to a digital value input to the DTC circuitry.
A non-transitory computer readable storage medium comprising instructions configured to control processing circuitry of a mobile radio frequency (RF) communication device to cause the processing circuitry to:
- determine a phase for a RF signal to be transmitted by a RF transceiver of the mobile RF communication device;
- provide a digital value input to a digital-to-time converter (DTC) circuitry to generate the determined phase for the RF signal;
- and
- set an adjustable bias current of a low dropout regulator (LDO) circuitry operatively coupled to the DTC circuit according to the digital value input to the DTC circuitry.
An apparatus comprising;
- a local oscillator (LO) circuit that provides a LO signal;
- digital-to-time converter (DTC) circuitry operatively coupled to the LO circuit and configured to convert a received digital value to a specified value of signal phase of the LO signal;
- and
- low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein the LDO circuitry includes a plurality of current mirrors to produce an adjustable bias current of the LDO circuitry and a value of the bias current of the LDO is determined according to the digital value received by the DTC circuitry.
Dependencies are inferred from the claim text.