Data processing device and data processing method

A data processing method comprising:

• receiving, by first circuitry of a data processing device, a signal transmitted from a transmitting device;
• extracting a transmission frame from the signal transmitted from the transmitting device;
• extracting data from the extracted transmission frame;
• demodulating the data extracted from the transmission frame to obtain interchanged code bits;
• performing, by the first circuitry, reverse interchange processing to return positions of the interchanged code bits obtained from the extracted data to original positions;
• and
• decoding an LDPC code obtained by the reverse interchange processing, the transmitting device including second circuitry that
• performs LDPC encoding based on a parity check matrix of the LDPC code in which a code length is 16200 bits and an encoding rate is 7/15, and
• interchanges code bits of the LDPC code in which the code length is 16200 bits and the encoding rate is 7/15 with symbol bits of a symbol corresponding to any of 8 signal points defined by 8-level phase-shift keying (8PSK),
• wherein, when 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a (#i+1)-th bit from a most significant bit of the 3 bits of code bits is set to a bit b#i, a (#i+1)-th bit from a most significant bit of 3 bits of the symbol bits of the one symbol is set to a bit y#i, and the second circuitry interchanges
• a bit b0 with a bit y1,
• a bit b1 with a bit y0, and
• a bit b2 with a bit y2,
• wherein the LDPC code includes information bits and parity bits,
• wherein the parity check matrix includes an information matrix part corresponding to the information bits and a parity matrix part corresponding to the parity bits,
• wherein the information matrix part is shown by a parity check matrix initial value table, and
• wherein the parity check matrix initial value table is a table showing positions of elements of 1 of the information matrix part for every 360 columns and is expressed as follows
• 3 137 314 327 983 1597 2028 3043 3217 4109 6020 6178 6535 6560 7146 7180 7408 7790 7893 8123 8313 8526 8616 8638
• 356 1197 1208 1839 1903 2712 3088 3537 4091 4301 4919 5068 6025 6195 6324 6378 6686 6829 7558 7745 8042 8382 8587 8602
• 18 187 1115 1417 1463 2300 2328 3502 3805 4677 4827 5551 5968 6394 6412 6753 7169 7524 7695 7976 8069 8118 8522 8582
• 714 2713 2726 2964 3055 3220 3334 3459 5557 5765 5841 6290 6419 6573 6856 7786 7937 8156 8286 8327 8384 8448 8539 8559
• 3452 7935 8092 8623
• 56 1955 3000 8242
• 1809 4094 7991 8489
• 2220 6455 7849 8548
• 1006 2576 3247 6976
• 2177 6048 7795 8295
• 1413 2595 7446 8594
• 2101 3714 7541 8531
• 10 5961 7484
• 3144 4636 5282
• 5708 5875 8390
• 3322 5223 7975
• 197 4653 8283
• 598 5393 8624
• 906 7249 7542
• 1223 2148 8195
• 976 2001 5005.

A data processing device comprising:

• first circuitry that
• receives a signal transmitted from a transmitting device;
• extracts a transmission frame from the signal transmitted from the transmitting device;
• extracts data from the extracted transmission frame;
• demodulates the data extracted from the transmission frame to obtain interchanged code bits;
• performs reverse interchange processing to return positions of the interchanged code bits obtained from the extracted data to original positions;
• and
• decodes an LDPC code obtained by the reverse interchange processing, the transmitting device including second circuitry that
• performs LDPC encoding based on a parity check matrix of the LDPC code in which a code length is 16200 bits and an encoding rate is 7/15, and
• interchanges a code bit of the LDPC code in which the code length is 16200 bits and the encoding rate is 7/15 with a symbol bit of a symbol corresponding to any of 16 signal points defined by 16-ary Amplitude and Phase Shift Keying (16APSK),
• wherein, when 4 bits of code bits stored in four units of storages having a storage capacity of 16200/4 bits and read bit by bit from the units of storages are allocated to one symbol, a (#i+1)-th bit from a most significant bit of the 4 bits of code bits is set to a bit b#i, a (#i+1)-th bit from a most significant bit of 4 bits of symbol bits of the one symbol is set to a bit y#i, and the second circuitry interchanges
• a bit b0 with a bit y2,
• a bit b1 with a bit y1,
• a bit b2 with a bit y0, and
• a bit b3 with a bit y3,
• wherein the LDPC code includes information bits and parity bits,
• wherein the parity check matrix includes an information matrix part corresponding to the information bits and a parity matrix part corresponding to the parity bits,
• wherein the information matrix part is shown by a parity check matrix initial value table, and
• wherein the parity check matrix initial value table is a table showing positions of elements of 1 of the information matrix part for every 360 columns and is expressed as follows
• 3 137 314 327 983 1597 2028 3043 3217 4109 6020 6178 6535 6560 7146 7180 7408 7790 7893 8123 8313 8526 8616 8638
• 356 1197 1208 1839 1903 2712 3088 3537 4091 4301 4919 5068 6025 6195 6324 6378 6686 6829 7558 7745 8042 8382 8587 8602
• 18 187 1115 1417 1463 2300 2328 3502 3805 4677 4827 5551 5968 6394 6412 6753 7169 7524 7695 7976 8069 8118 8522 8582
• 714 2713 2726 2964 3055 3220 3334 3459 5557 5765 5841 6290 6419 6573 6856 7786 7937 8156 8286 8327 8384 8448 8539 8559
• 3452 7935 8092 8623
• 56 1955 3000 8242
• 1809 4094 7991 8489
• 2220 6455 7849 8548
• 1006 2576 3247 6976
• 2177 6048 7795 8295
• 1413 2595 7446 8594
• 2101 3714 7541 8531
• 10 5961 7484
• 3144 4636 5282
• 5708 5875 8390
• 3322 5223 7975
• 197 4653 8283
• 598 5393 8624
• 906 7249 7542
• 1223 2148 8195
• 976 2001 5005.

A data processing method comprising:

• receiving, by first circuitry of a data processing device, a signal transmitted from a transmitting device;
• extracting a transmission frame from the signal transmitted from the transmitting device;
• extracting data from the extracted transmission frame;
• demodulating the data extracted from the transmission frame to obtain interchanged code bits;
• performing, by the first circuitry, reverse interchange processing to return positions of the interchanged code bits obtained from the extracted data to original positions;
• and
• decoding an LDPC code obtained by the reverse interchange processing, the transmitting device including second circuitry that
• performs LDPC encoding based on a parity check matrix of the LDPC code in which a code length is 16200 bits and an encoding rate is 7/15, and
• interchanges a code bit of the LDPC code in which the code length is 16200 bits and the encoding rate is 7/15 with a symbol bit of a symbol corresponding to any of 16 signal points defined by 16-ary Amplitude and Phase Shift Keying (16APSK),
• wherein, when 4 bits of code bits stored in four units of storages having a storage capacity of 16200/4 bits and read bit by bit from the units of storages are allocated to one symbol, a (#i+1)-th bit from a most significant bit of the 4 bits of code bits is set to a bit b#i, a (#i+1)-th bit from a most significant bit of 4 bits of symbol bits of the one symbol is set to a bit y#i, and the second circuitry interchanges
• a bit b0 with a bit y2,
• a bit b1 with a bit y1,
• a bit b2 with a bit y0, and
• a bit b3 with a bit y3,
• wherein the LDPC code includes an information bits and a parity bits,
• wherein the parity check matrix includes an information matrix part corresponding to the information bits and a parity matrix part corresponding to the parity bits,
• wherein the information matrix part is shown by a parity check matrix initial value table, and
• wherein the parity check matrix initial value table is a table showing positions of elements of 1 of the information matrix part for every 360 columns and is expressed as follows
• 3 137 314 327 983 1597 2028 3043 3217 4109 6020 6178 6535 6560 7146 7180 7408 7790 7893 8123 8313 8526 8616 8638
• 356 1197 1208 1839 1903 2712 3088 3537 4091 4301 4919 5068 6025 6195 6324 6378 6686 6829 7558 7745 8042 8382 8587 8602
• 18 187 1115 1417 1463 2300 2328 3502 3805 4677 4827 5551 5968 6394 6412 6753 7169 7524 7695 7976 8069 8118 8522 8582
• 714 2713 2726 2964 3055 3220 3334 3459 5557 5765 5841 6290 6419 6573 6856 7786 7937 8156 8286 8327 8384 8448 8539 8559
• 3452 7935 8092 8623
• 56 1955 3000 8242
• 1809 4094 7991 8489
• 2220 6455 7849 8548
• 1006 2576 3247 6976
• 2177 6048 7795 8295
• 1413 2595 7446 8594
• 2101 3714 7541 8531
• 10 5961 7484
• 3144 4636 5282
• 5708 5875 8390
• 3322 5223 7975
• 197 4653 8283
• 598 5393 8624
• 906 7249 7542
• 1223 2148 8195
• 976 2001 5005.